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From: Mathias Nyman <mathias.nyman@linux.intel.com>
To: Michal Pecio <michal.pecio@gmail.com>
Cc: Mathias Nyman <mathias.nyman@intel.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Bart Nagel <bart@tremby.net>,
	linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 5/5] usb: xhci: Rework and improve the TD matching and skipping logic
Date: Fri, 7 Aug 2026 01:16:21 +0300	[thread overview]
Message-ID: <1b9df974-69ce-47d7-a17a-bc723dd8c2c1@linux.intel.com> (raw)
In-Reply-To: <20260806130022.77401337.michal.pecio@gmail.com>

On 8/6/26 14:00, Michal Pecio wrote:
>> On Wed, 5 Aug 2026 20:39:12 +0300, Mathias Nyman wrote:
>> If the event points to a valid trb ahead of last trb in td, but
>> before the enqueue pointer, then we know hardware has passed this td
>> and we can give it back.
> 
> Actually, we don't, because of a race condition (and driver bug).
> 
> A very long TD completes with Short Packet on the first TRB.
> We give back the TD and advance ep_ring->dequeue past it (bug).
> Some event is generated later in the TD but we don't know yet.
> We queue a lot of TRBs and move enqueue into the completed TD.
> 
> We handle the event and it appears to be "before" enqueue. But
> the HW not only hasn't passed, it hasn't even begun executing
> any TD after the initially completed one.
> 
> We give them back and later get their events, or IOMMU faults.
> 

This isn't a realistic scenario.

Ring expansion needs to fail and class driver need to fill entire
ring buffer in the extremely short time between the short transfer
event mid TD, and the final completion event for the same TD.

xHC isn't really processing the rest of the TD's TRBs (no data
transfer) after a short transfer event.
A second event for that TD will likely point to the last TRB as
it has the IOC flag set, and that event will come almost instantly,
probably so close that both events are handled during one interrupt
handler call.

We would already now see severe issues if this could happen.
Queuing TRBs beyond hw dequeue on a full ring would overwrite the
cycle bit and hardware would likely just stop processing any TRBs

I do support changing the software dequeue to better match hardware
dequeue.

Thanks
Mathias




  reply	other threads:[~2026-08-06 22:16 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-04 10:01 [PATCH 0/5] xhci: Sort out the TD skipping business Michal Pecio
2026-08-04 10:02 ` [PATCH 1/5] usb: xhci: Handle bogus TRB pointers in Missed Service Error events Michal Pecio
2026-08-05 17:13   ` Mathias Nyman
2026-08-04 10:03 ` [PATCH 2/5] usb: xhci: Guarantee URB giveback on Ring Underrun/Overrun Michal Pecio
2026-08-04 10:03 ` [PATCH 3/5] usb: xhci: Don't set the skip flag on non-isoc endpoints Michal Pecio
2026-08-04 10:04 ` [PATCH 4/5] usb: xhci: Shorten the TD skipping loop Michal Pecio
2026-08-05 17:14   ` Mathias Nyman
2026-08-04 10:05 ` [PATCH 5/5] usb: xhci: Rework and improve the TD matching and skipping logic Michal Pecio
2026-08-05 17:39   ` Mathias Nyman
2026-08-05 19:30     ` Michal Pecio
2026-08-06 11:00       ` Michal Pecio
2026-08-06 22:16         ` Mathias Nyman [this message]
2026-08-05 19:06 ` [PATCH 0/5] xhci: Sort out the TD skipping business Bart Nagel
2026-08-05 20:21   ` Michal Pecio
2026-08-06 18:28     ` Bart Nagel

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