Re: [PATCH 08/16] arm64: dts: st: Add ucpd node on stm32mp251

[Fabrice Gasnier <fabrice.gasnier@foss.st.com>]

On 8/22/26 07:00, Marek Vasut wrote:
> On 8/21/26 6:23 PM, Fabrice Gasnier wrote:
>> Describe UCPD bindings and nvmem cells to access trim values.
>> This provides the PD and CC USB-C cable signaling functions.
>>
>> Co-developed-by: Christian Bruel <christian.bruel@foss.st.com>
>> Signed-off-by: Christian Bruel <christian.bruel@foss.st.com>
>> Co-developed-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
>> Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
>> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
>> ---
>>   arch/arm64/boot/dts/st/stm32mp251.dtsi | 51 ++++++++++++++++++++++++
>> ++++++++++
>>   1 file changed, 51 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/
>> dts/st/stm32mp251.dtsi
>> index 9dc7a05fce99..be54dd56713b 100644
>> --- a/arch/arm64/boot/dts/st/stm32mp251.dtsi
> 
> [...]
> 
>> @@ -1818,10 +1839,40 @@ part-number-otp@24 {
>>                   reg = <0x24 0x4>;
>>               };
>>   +            ucpd_trim_3a_cc1: trim_3a_cc1@1bd,1 {
>> +                reg = <0x1bd 0x1>;
>> +                bits = <1 4>;
>> +            };
>> +
>> +            ucpd_trim_3a_cc2: trim_3a_cc2@1bf,1 {
>> +                reg = <0x1bf 0x1>;
>> +                bits = <1 4>;
>> +            };
> 
> These two fuse fields ^ do not seem to match STM32MP25xx documentation ?
> 
> RM0457 Rev 5
> Table 876. UCPD software trim data
> Page 5013
> 
>                Non-volatile memory location
> Name                 Address       Bits
> 3A0_CC1[3:0]       0x5400 01E8     11:8
> 3A0_CC2[3:0]       0x5400 01E8     11:8
> ^^^^^^^                   ^^^^     ^^^^
> 

Hi Marek,

Yes, I've raised it internally (ST) so the documentation gets clarified.

Please look at "OTP mapping" section instead, Table 34.

e.g. OTP111

word/bits |

9 to 12  | USBTC_VIREF1_3A0[3:0] | USB Type C CC1 ref current trim (±6%)
in 3 A mode
25 to 28 | USBTC_VIREF2_3A0[3:0] | USB Type C CC2 ref current trim (±6%)
in 3 A mode

and OTP122
4 to 7   | USBTC_CCRPD1[3:0]     | USB Type C CC1 5.1Kohm pull down trim
(±10%)
8 to 11  | USBTC_VIREF1_1A5[3:0] | USB Type C CC1 ref current trim (±6%)
in 1.5 A mode
12 to 15 | USBTC_CCRPD2[3:0]     | USB Type C CC2 pull down trim (5.1 K
±10%)
16 to 19 | USBTC_VIREF2_1A5[3:0] | USB Type C CC2 ref current trim (±6%)
in 1.5 A mode

BR,
Fabrice

>>               package-otp@1e8 {
>>                   reg = <0x1e8 0x1>;
>>                   bits = <0 3>;
>>               };
> [...]