* [v2,1/2] dt-bindings: Add Qualcomm USB Super-Speed PHY bindings
@ 2019-01-29 11:35 Jorge Ramirez
0 siblings, 0 replies; 6+ messages in thread
From: Jorge Ramirez @ 2019-01-29 11:35 UTC (permalink / raw)
To: jorge.ramirez-ortiz, gregkh, mark.rutland, kishon, jackp,
andy.gross, swboyd
Cc: shawn.guo, vkoul, bjorn.andersson, khasim.mohammed, devicetree,
linux-arm-kernel, linux-arm-msm, linux-usb, linux-kernel
Binding description for Qualcomm's Synopsys 1.0.0 super-speed PHY
controller embedded in QCS404.
Based on Sriharsha Allenki's <sallenki@codeaurora.org> original
definitions.
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
---
.../devicetree/bindings/usb/qcom,usb-ssphy.txt | 73 ++++++++++++++++++++++
1 file changed, 73 insertions(+)
create mode 100644 Documentation/devicetree/bindings/usb/qcom,usb-ssphy.txt
diff --git a/Documentation/devicetree/bindings/usb/qcom,usb-ssphy.txt b/Documentation/devicetree/bindings/usb/qcom,usb-ssphy.txt
new file mode 100644
index 0000000..8ef6e39
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/qcom,usb-ssphy.txt
@@ -0,0 +1,73 @@
+Qualcomm Synopsys 1.0.0 SS phy controller
+===========================================
+
+Synopsys 1.0.0 ss phy controller supports SS usb connectivity on Qualcomm
+chipsets
+
+Required properties:
+
+- compatible:
+ Value type: <string>
+ Definition: Should contain "qcom,usb-ssphy".
+
+- reg:
+ Value type: <prop-encoded-array>
+ Definition: USB PHY base address and length of the register map.
+
+- #phy-cells:
+ Value type: <u32>
+ Definition: Should be 0. See phy/phy-bindings.txt for details.
+
+- clocks:
+ Value type: <prop-encoded-array>
+ Definition: See clock-bindings.txt section "consumers". List of
+ three clock specifiers for reference, phy core and
+ pipe clocks.
+
+- clock-names:
+ Value type: <string>
+ Definition: Names of the clocks in 1-1 correspondence with the "clocks"
+ property. Must contain "ref", "phy" and "pipe".
+
+- vdd-supply:
+ Value type: <phandle>
+ Definition: phandle to the regulator VDD supply node.
+
+- vdda1p8-supply:
+ Value type: <phandle>
+ Definition: phandle to the regulator 1.8V supply node.
+
+
+Optional child nodes:
+
+- vbus-supply:
+ Value type: <phandle>
+ Definition: phandle to the VBUS supply node.
+
+- resets:
+ Value type: <prop-encoded-array>
+ Definition: See reset.txt section "consumers". PHY reset specifiers
+ for phy core and COR resets.
+
+- reset-names:
+ Value type: <string>
+ Definition: Names of the resets in 1-1 correspondence with the "resets"
+ property. Must contain "com" and "phy".
+
+Example:
+
+usb3_phy: phy@78000 {
+ compatible = "qcom,usb-ssphy";
+ reg = <0x78000 0x400>;
+ #phy-cells = <0>;
+ clocks = <&rpmcc RPM_SMD_LN_BB_CLK>,
+ <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>,
+ <&gcc GCC_USB3_PHY_PIPE_CLK>;
+ clock-names = "ref", "phy", "pipe";
+ resets = <&gcc GCC_USB3_PHY_BCR>,
+ <&gcc GCC_USB3PHY_PHY_BCR>;
+ reset-names = "com", "phy";
+ vdd-supply = <&vreg_l3_1p05>;
+ vdda1p8-supply = <&vreg_l5_1p8>;
+ vbus-supply = <&usb3_vbus_reg>;
+};
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [v2,1/2] dt-bindings: Add Qualcomm USB Super-Speed PHY bindings
@ 2019-01-29 20:38 Bjorn Andersson
0 siblings, 0 replies; 6+ messages in thread
From: Bjorn Andersson @ 2019-01-29 20:38 UTC (permalink / raw)
To: Jorge Ramirez-Ortiz
Cc: gregkh, mark.rutland, kishon, jackp, andy.gross, swboyd,
shawn.guo, vkoul, khasim.mohammed, devicetree, linux-arm-kernel,
linux-arm-msm, linux-usb, linux-kernel
On Tue 29 Jan 03:35 PST 2019, Jorge Ramirez-Ortiz wrote:
> Binding description for Qualcomm's Synopsys 1.0.0 super-speed PHY
SuperSpeed
> controller embedded in QCS404.
>
> Based on Sriharsha Allenki's <sallenki@codeaurora.org> original
> definitions.
>
> Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
> ---
> .../devicetree/bindings/usb/qcom,usb-ssphy.txt | 73 ++++++++++++++++++++++
> 1 file changed, 73 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/usb/qcom,usb-ssphy.txt
>
> diff --git a/Documentation/devicetree/bindings/usb/qcom,usb-ssphy.txt b/Documentation/devicetree/bindings/usb/qcom,usb-ssphy.txt
> new file mode 100644
> index 0000000..8ef6e39
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/usb/qcom,usb-ssphy.txt
> @@ -0,0 +1,73 @@
> +Qualcomm Synopsys 1.0.0 SS phy controller
> +===========================================
> +
> +Synopsys 1.0.0 ss phy controller supports SS usb connectivity on Qualcomm
> +chipsets
It's based on Synopsys IP, but it's Qualcomm's version, and isn't the
1.0.0 Qualcomm's version number for this block?
Also I think it "provides SuperSpeed USB connectivity on some Qualcomm
platforms".
> +
> +Required properties:
> +
> +- compatible:
> + Value type: <string>
> + Definition: Should contain "qcom,usb-ssphy".
> +
> +- reg:
> + Value type: <prop-encoded-array>
> + Definition: USB PHY base address and length of the register map.
> +
> +- #phy-cells:
> + Value type: <u32>
> + Definition: Should be 0. See phy/phy-bindings.txt for details.
> +
> +- clocks:
> + Value type: <prop-encoded-array>
> + Definition: See clock-bindings.txt section "consumers". List of
> + three clock specifiers for reference, phy core and
> + pipe clocks.
> +
> +- clock-names:
> + Value type: <string>
> + Definition: Names of the clocks in 1-1 correspondence with the "clocks"
> + property. Must contain "ref", "phy" and "pipe".
> +
> +- vdd-supply:
> + Value type: <phandle>
> + Definition: phandle to the regulator VDD supply node.
> +
> +- vdda1p8-supply:
> + Value type: <phandle>
> + Definition: phandle to the regulator 1.8V supply node.
> +
> +
> +Optional child nodes:
> +
> +- vbus-supply:
> + Value type: <phandle>
> + Definition: phandle to the VBUS supply node.
> +
> +- resets:
> + Value type: <prop-encoded-array>
> + Definition: See reset.txt section "consumers". PHY reset specifiers
> + for phy core and COR resets.
> +
> +- reset-names:
> + Value type: <string>
> + Definition: Names of the resets in 1-1 correspondence with the "resets"
> + property. Must contain "com" and "phy".
Perhaps "Must contain both com and phy, if property is specified", to
clarify that it's all or nothing.
Looks good otherwise.
Regards,
Bjorn
^ permalink raw reply [flat|nested] 6+ messages in thread
* [v2,1/2] dt-bindings: Add Qualcomm USB Super-Speed PHY bindings
@ 2019-01-30 20:02 Rob Herring
0 siblings, 0 replies; 6+ messages in thread
From: Rob Herring @ 2019-01-30 20:02 UTC (permalink / raw)
To: Jorge Ramirez-Ortiz
Cc: gregkh, mark.rutland, kishon, jackp, andy.gross, swboyd,
shawn.guo, vkoul, bjorn.andersson, khasim.mohammed, devicetree,
linux-arm-kernel, linux-arm-msm, linux-usb, linux-kernel
On Tue, Jan 29, 2019 at 12:35:14PM +0100, Jorge Ramirez-Ortiz wrote:
> Binding description for Qualcomm's Synopsys 1.0.0 super-speed PHY
> controller embedded in QCS404.
>
> Based on Sriharsha Allenki's <sallenki@codeaurora.org> original
> definitions.
>
> Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
> ---
> .../devicetree/bindings/usb/qcom,usb-ssphy.txt | 73 ++++++++++++++++++++++
> 1 file changed, 73 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/usb/qcom,usb-ssphy.txt
>
> diff --git a/Documentation/devicetree/bindings/usb/qcom,usb-ssphy.txt b/Documentation/devicetree/bindings/usb/qcom,usb-ssphy.txt
> new file mode 100644
> index 0000000..8ef6e39
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/usb/qcom,usb-ssphy.txt
> @@ -0,0 +1,73 @@
> +Qualcomm Synopsys 1.0.0 SS phy controller
> +===========================================
> +
> +Synopsys 1.0.0 ss phy controller supports SS usb connectivity on Qualcomm
> +chipsets
> +
> +Required properties:
> +
> +- compatible:
> + Value type: <string>
> + Definition: Should contain "qcom,usb-ssphy".
This is in no way specific enough.
> +
> +- reg:
> + Value type: <prop-encoded-array>
> + Definition: USB PHY base address and length of the register map.
> +
> +- #phy-cells:
> + Value type: <u32>
> + Definition: Should be 0. See phy/phy-bindings.txt for details.
> +
> +- clocks:
> + Value type: <prop-encoded-array>
> + Definition: See clock-bindings.txt section "consumers". List of
> + three clock specifiers for reference, phy core and
> + pipe clocks.
> +
> +- clock-names:
> + Value type: <string>
> + Definition: Names of the clocks in 1-1 correspondence with the "clocks"
> + property. Must contain "ref", "phy" and "pipe".
> +
> +- vdd-supply:
> + Value type: <phandle>
> + Definition: phandle to the regulator VDD supply node.
> +
> +- vdda1p8-supply:
> + Value type: <phandle>
> + Definition: phandle to the regulator 1.8V supply node.
> +
> +
> +Optional child nodes:
> +
> +- vbus-supply:
> + Value type: <phandle>
> + Definition: phandle to the VBUS supply node.
Does the phy actually get supplied by Vbus? If not, then Vbus supply
should be defined in a USB connector node.
> +
> +- resets:
> + Value type: <prop-encoded-array>
> + Definition: See reset.txt section "consumers". PHY reset specifiers
> + for phy core and COR resets.
COR or COM?
Looks to me the order is reversed.
> +
> +- reset-names:
> + Value type: <string>
> + Definition: Names of the resets in 1-1 correspondence with the "resets"
> + property. Must contain "com" and "phy".
> +
> +Example:
> +
> +usb3_phy: phy@78000 {
usb3-phy@...
> + compatible = "qcom,usb-ssphy";
> + reg = <0x78000 0x400>;
> + #phy-cells = <0>;
> + clocks = <&rpmcc RPM_SMD_LN_BB_CLK>,
> + <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>,
> + <&gcc GCC_USB3_PHY_PIPE_CLK>;
> + clock-names = "ref", "phy", "pipe";
> + resets = <&gcc GCC_USB3_PHY_BCR>,
> + <&gcc GCC_USB3PHY_PHY_BCR>;
> + reset-names = "com", "phy";
> + vdd-supply = <&vreg_l3_1p05>;
> + vdda1p8-supply = <&vreg_l5_1p8>;
> + vbus-supply = <&usb3_vbus_reg>;
> +};
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* [v2,1/2] dt-bindings: Add Qualcomm USB Super-Speed PHY bindings
@ 2019-02-05 11:02 Jorge Ramirez
0 siblings, 0 replies; 6+ messages in thread
From: Jorge Ramirez @ 2019-02-05 11:02 UTC (permalink / raw)
To: Rob Herring
Cc: gregkh, mark.rutland, kishon, jackp, andy.gross, swboyd,
shawn.guo, vkoul, bjorn.andersson, khasim.mohammed, devicetree,
linux-arm-kernel, linux-arm-msm, linux-usb, linux-kernel
On 1/30/19 21:02, Rob Herring wrote:
> On Tue, Jan 29, 2019 at 12:35:14PM +0100, Jorge Ramirez-Ortiz wrote:
>> Binding description for Qualcomm's Synopsys 1.0.0 super-speed PHY
>> controller embedded in QCS404.
>>
>> Based on Sriharsha Allenki's <sallenki@codeaurora.org> original
>> definitions.
>>
>> Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
>> ---
>> .../devicetree/bindings/usb/qcom,usb-ssphy.txt | 73 ++++++++++++++++++++++
>> 1 file changed, 73 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/usb/qcom,usb-ssphy.txt
>>
>> diff --git a/Documentation/devicetree/bindings/usb/qcom,usb-ssphy.txt b/Documentation/devicetree/bindings/usb/qcom,usb-ssphy.txt
>> new file mode 100644
>> index 0000000..8ef6e39
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/usb/qcom,usb-ssphy.txt
>> @@ -0,0 +1,73 @@
>> +Qualcomm Synopsys 1.0.0 SS phy controller
>> +===========================================
>> +
>> +Synopsys 1.0.0 ss phy controller supports SS usb connectivity on Qualcomm
>> +chipsets
>> +
>> +Required properties:
>> +
>> +- compatible:
>> + Value type: <string>
>> + Definition: Should contain "qcom,usb-ssphy".
>
> This is in no way specific enough.
ok. will remove the old unused bindings and reuse qcom,dwc3-ss-usb-phy
>
>> +
>> +- reg:
>> + Value type: <prop-encoded-array>
>> + Definition: USB PHY base address and length of the register map.
>> +
>> +- #phy-cells:
>> + Value type: <u32>
>> + Definition: Should be 0. See phy/phy-bindings.txt for details.
>> +
>> +- clocks:
>> + Value type: <prop-encoded-array>
>> + Definition: See clock-bindings.txt section "consumers". List of
>> + three clock specifiers for reference, phy core and
>> + pipe clocks.
>> +
>> +- clock-names:
>> + Value type: <string>
>> + Definition: Names of the clocks in 1-1 correspondence with the "clocks"
>> + property. Must contain "ref", "phy" and "pipe".
>> +
>> +- vdd-supply:
>> + Value type: <phandle>
>> + Definition: phandle to the regulator VDD supply node.
>> +
>> +- vdda1p8-supply:
>> + Value type: <phandle>
>> + Definition: phandle to the regulator 1.8V supply node.
>> +
>> +
>> +Optional child nodes:
>> +
>> +- vbus-supply:
>> + Value type: <phandle>
>> + Definition: phandle to the VBUS supply node.
>
> Does the phy actually get supplied by Vbus? If not, then Vbus supply
> should be defined in a USB connector node.
yes per the documentation vbus can optionally be routed to the phy to
drive a signal to the controller.
>
>> +
>> +- resets:
>> + Value type: <prop-encoded-array>
>> + Definition: See reset.txt section "consumers". PHY reset specifiers
>> + for phy core and COR resets.
>
> COR or COM?
com
>
> Looks to me the order is reversed.
yes
>
>> +
>> +- reset-names:
>> + Value type: <string>
>> + Definition: Names of the resets in 1-1 correspondence with the "resets"
>> + property. Must contain "com" and "phy".
>> +
>> +Example:
>> +
>> +usb3_phy: phy@78000 {
>
> usb3-phy@...
ok
>
>> + compatible = "qcom,usb-ssphy";
>> + reg = <0x78000 0x400>;
>> + #phy-cells = <0>;
>> + clocks = <&rpmcc RPM_SMD_LN_BB_CLK>,
>> + <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>,
>> + <&gcc GCC_USB3_PHY_PIPE_CLK>;
>> + clock-names = "ref", "phy", "pipe";
>> + resets = <&gcc GCC_USB3_PHY_BCR>,
>> + <&gcc GCC_USB3PHY_PHY_BCR>;
>> + reset-names = "com", "phy";
>> + vdd-supply = <&vreg_l3_1p05>;
>> + vdda1p8-supply = <&vreg_l5_1p8>;
>> + vbus-supply = <&usb3_vbus_reg>;
>> +};
>> --
>> 2.7.4
>>
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* [v2,1/2] dt-bindings: Add Qualcomm USB Super-Speed PHY bindings
@ 2019-02-06 14:11 Jorge Ramirez
0 siblings, 0 replies; 6+ messages in thread
From: Jorge Ramirez @ 2019-02-06 14:11 UTC (permalink / raw)
To: Rob Herring
Cc: gregkh, mark.rutland, kishon, jackp, andy.gross, swboyd,
shawn.guo, vkoul, bjorn.andersson, khasim.mohammed, devicetree,
linux-arm-kernel, linux-arm-msm, linux-usb, linux-kernel
On 2/5/19 12:02, Jorge Ramirez wrote:
> On 1/30/19 21:02, Rob Herring wrote:
>> On Tue, Jan 29, 2019 at 12:35:14PM +0100, Jorge Ramirez-Ortiz wrote:
>>> Binding description for Qualcomm's Synopsys 1.0.0 super-speed PHY
>>> controller embedded in QCS404.
>>>
>>> Based on Sriharsha Allenki's <sallenki@codeaurora.org> original
>>> definitions.
>>>
>>> Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
>>> ---
>>> .../devicetree/bindings/usb/qcom,usb-ssphy.txt | 73 ++++++++++++++++++++++
>>> 1 file changed, 73 insertions(+)
>>> create mode 100644 Documentation/devicetree/bindings/usb/qcom,usb-ssphy.txt
>>>
>>> diff --git a/Documentation/devicetree/bindings/usb/qcom,usb-ssphy.txt b/Documentation/devicetree/bindings/usb/qcom,usb-ssphy.txt
>>> new file mode 100644
>>> index 0000000..8ef6e39
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/usb/qcom,usb-ssphy.txt
>>> @@ -0,0 +1,73 @@
>>> +Qualcomm Synopsys 1.0.0 SS phy controller
>>> +===========================================
>>> +
>>> +Synopsys 1.0.0 ss phy controller supports SS usb connectivity on Qualcomm
>>> +chipsets
>>> +
>>> +Required properties:
>>> +
>>> +- compatible:
>>> + Value type: <string>
>>> + Definition: Should contain "qcom,usb-ssphy".
>>
>> This is in no way specific enough.
>
> ok. will remove the old unused bindings and reuse qcom,dwc3-ss-usb-phy
>
>>
>>> +
>>> +- reg:
>>> + Value type: <prop-encoded-array>
>>> + Definition: USB PHY base address and length of the register map.
>>> +
>>> +- #phy-cells:
>>> + Value type: <u32>
>>> + Definition: Should be 0. See phy/phy-bindings.txt for details.
>>> +
>>> +- clocks:
>>> + Value type: <prop-encoded-array>
>>> + Definition: See clock-bindings.txt section "consumers". List of
>>> + three clock specifiers for reference, phy core and
>>> + pipe clocks.
>>> +
>>> +- clock-names:
>>> + Value type: <string>
>>> + Definition: Names of the clocks in 1-1 correspondence with the "clocks"
>>> + property. Must contain "ref", "phy" and "pipe".
>>> +
>>> +- vdd-supply:
>>> + Value type: <phandle>
>>> + Definition: phandle to the regulator VDD supply node.
>>> +
>>> +- vdda1p8-supply:
>>> + Value type: <phandle>
>>> + Definition: phandle to the regulator 1.8V supply node.
>>> +
>>> +
>>> +Optional child nodes:
>>> +
>>> +- vbus-supply:
>>> + Value type: <phandle>
>>> + Definition: phandle to the VBUS supply node.
>>
>> Does the phy actually get supplied by Vbus? If not, then Vbus supply
>> should be defined in a USB connector node.
>
> yes per the documentation vbus can optionally be routed to the phy to
> drive a signal to the controller.
funny enough when vbus is optionally routed to the phy is not to be
controlled like we do when the vbus-supply property is present.
So to all effects no, you are right, the phy does not get supplied by VBUS.
would defining the connector like this be enough?
usb3_phy: usb3-phy@78000 {
compatible = "qcom,snps-usb-ssphy";
[...]
usb3_c_connector: usb3-c-connector {
compatible = "usb-c-connector";
label = "USB-C";
type = "micro";
vbus-supply = <&usb3_vbus_reg>;
};
};
>
>
>>
>>> +
>>> +- resets:
>>> + Value type: <prop-encoded-array>
>>> + Definition: See reset.txt section "consumers". PHY reset specifiers
>>> + for phy core and COR resets.
>>
>> COR or COM?
>
> com
>>
>> Looks to me the order is reversed.
>
> yes
>
>>
>>> +
>>> +- reset-names:
>>> + Value type: <string>
>>> + Definition: Names of the resets in 1-1 correspondence with the "resets"
>>> + property. Must contain "com" and "phy".
>>> +
>>> +Example:
>>> +
>>> +usb3_phy: phy@78000 {
>>
>> usb3-phy@...
>
> ok
>
>>
>>> + compatible = "qcom,usb-ssphy";
>>> + reg = <0x78000 0x400>;
>>> + #phy-cells = <0>;
>>> + clocks = <&rpmcc RPM_SMD_LN_BB_CLK>,
>>> + <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>,
>>> + <&gcc GCC_USB3_PHY_PIPE_CLK>;
>>> + clock-names = "ref", "phy", "pipe";
>>> + resets = <&gcc GCC_USB3_PHY_BCR>,
>>> + <&gcc GCC_USB3PHY_PHY_BCR>;
>>> + reset-names = "com", "phy";
>>> + vdd-supply = <&vreg_l3_1p05>;
>>> + vdda1p8-supply = <&vreg_l5_1p8>;
>>> + vbus-supply = <&usb3_vbus_reg>;
>>> +};
>>> --
>>> 2.7.4
>>>
>>
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* [v2,1/2] dt-bindings: Add Qualcomm USB Super-Speed PHY bindings
@ 2019-02-12 20:47 Rob Herring
0 siblings, 0 replies; 6+ messages in thread
From: Rob Herring @ 2019-02-12 20:47 UTC (permalink / raw)
To: Jorge Ramirez
Cc: Greg Kroah-Hartman, Mark Rutland, Kishon Vijay Abraham I, jackp,
Andy Gross, Stephen Boyd, Shawn Guo, Vinod, Bjorn Andersson,
Khasim Syed Mohammed, devicetree,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
linux-arm-msm, Linux USB List, linux-kernel@vger.kernel.org
On Wed, Feb 6, 2019 at 8:11 AM Jorge Ramirez
<jorge.ramirez-ortiz@linaro.org> wrote:
>
> On 2/5/19 12:02, Jorge Ramirez wrote:
> > On 1/30/19 21:02, Rob Herring wrote:
> >> On Tue, Jan 29, 2019 at 12:35:14PM +0100, Jorge Ramirez-Ortiz wrote:
> >>> Binding description for Qualcomm's Synopsys 1.0.0 super-speed PHY
> >>> controller embedded in QCS404.
> >>>
> >>> Based on Sriharsha Allenki's <sallenki@codeaurora.org> original
> >>> definitions.
> >>>
> >>> Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
> >>> ---
> >>> .../devicetree/bindings/usb/qcom,usb-ssphy.txt | 73 ++++++++++++++++++++++
> >>> 1 file changed, 73 insertions(+)
> >>> create mode 100644 Documentation/devicetree/bindings/usb/qcom,usb-ssphy.txt
> >>>
> >>> diff --git a/Documentation/devicetree/bindings/usb/qcom,usb-ssphy.txt b/Documentation/devicetree/bindings/usb/qcom,usb-ssphy.txt
> >>> new file mode 100644
> >>> index 0000000..8ef6e39
> >>> --- /dev/null
> >>> +++ b/Documentation/devicetree/bindings/usb/qcom,usb-ssphy.txt
> >>> @@ -0,0 +1,73 @@
> >>> +Qualcomm Synopsys 1.0.0 SS phy controller
> >>> +===========================================
> >>> +
> >>> +Synopsys 1.0.0 ss phy controller supports SS usb connectivity on Qualcomm
> >>> +chipsets
> >>> +
> >>> +Required properties:
> >>> +
> >>> +- compatible:
> >>> + Value type: <string>
> >>> + Definition: Should contain "qcom,usb-ssphy".
> >>
> >> This is in no way specific enough.
> >
> > ok. will remove the old unused bindings and reuse qcom,dwc3-ss-usb-phy
> >
> >>
> >>> +
> >>> +- reg:
> >>> + Value type: <prop-encoded-array>
> >>> + Definition: USB PHY base address and length of the register map.
> >>> +
> >>> +- #phy-cells:
> >>> + Value type: <u32>
> >>> + Definition: Should be 0. See phy/phy-bindings.txt for details.
> >>> +
> >>> +- clocks:
> >>> + Value type: <prop-encoded-array>
> >>> + Definition: See clock-bindings.txt section "consumers". List of
> >>> + three clock specifiers for reference, phy core and
> >>> + pipe clocks.
> >>> +
> >>> +- clock-names:
> >>> + Value type: <string>
> >>> + Definition: Names of the clocks in 1-1 correspondence with the "clocks"
> >>> + property. Must contain "ref", "phy" and "pipe".
> >>> +
> >>> +- vdd-supply:
> >>> + Value type: <phandle>
> >>> + Definition: phandle to the regulator VDD supply node.
> >>> +
> >>> +- vdda1p8-supply:
> >>> + Value type: <phandle>
> >>> + Definition: phandle to the regulator 1.8V supply node.
> >>> +
> >>> +
> >>> +Optional child nodes:
> >>> +
> >>> +- vbus-supply:
> >>> + Value type: <phandle>
> >>> + Definition: phandle to the VBUS supply node.
> >>
> >> Does the phy actually get supplied by Vbus? If not, then Vbus supply
> >> should be defined in a USB connector node.
> >
> > yes per the documentation vbus can optionally be routed to the phy to
> > drive a signal to the controller.
>
>
> funny enough when vbus is optionally routed to the phy is not to be
> controlled like we do when the vbus-supply property is present.
>
> So to all effects no, you are right, the phy does not get supplied by VBUS.
>
> would defining the connector like this be enough?
>
> usb3_phy: usb3-phy@78000 {
> compatible = "qcom,snps-usb-ssphy";
> [...]
> usb3_c_connector: usb3-c-connector {
> compatible = "usb-c-connector";
> label = "USB-C";
> type = "micro";
> vbus-supply = <&usb3_vbus_reg>;
> };
> };
IIRC, the connector node is defined to go under either the USB
controller or a USB-C controller (if a separate chip controlling the
USB-PD and alternate modes). We generally don't put PHYs into a node
topology, but keep them as a phandle reference.
Rob
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2019-02-12 20:47 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
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2019-01-29 20:38 [v2,1/2] dt-bindings: Add Qualcomm USB Super-Speed PHY bindings Bjorn Andersson
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2019-02-12 20:47 Rob Herring
2019-02-06 14:11 Jorge Ramirez
2019-02-05 11:02 Jorge Ramirez
2019-01-30 20:02 Rob Herring
2019-01-29 11:35 Jorge Ramirez
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