From mboxrd@z Thu Jan 1 00:00:00 1970 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Subject: [V2,4/8] dt-bindings: usb: Add NVIDIA Tegra XUSB device mode controller binding From: Thierry Reding Message-Id: <20190425135726.GB24213@ulmo> Date: Thu, 25 Apr 2019 15:57:26 +0200 To: Nagarjuna Kristam Cc: balbi@kernel.org, gregkh@linuxfoundation.org, jonathanh@nvidia.com, linux-tegra@vger.kernel.org, linux-usb@vger.kernel.org List-ID: T24gTW9uLCBNYXIgMTEsIDIwMTkgYXQgMDQ6NDE6NTJQTSArMDUzMCwgTmFnYXJqdW5hIEtyaXN0 YW0gd3JvdGU6Cj4gQWRkIGRldmljZS10cmVlIGJpbmRpbmcgZG9jdW1lbnRhdGlvbiBmb3IgdGhl IFhVU0IgZGV2aWNlIG1vZGUgY29udHJvbGxlcgo+IHByZXNlbnQgb24gdGVncmEyMTAgU29DLiBU aGlzIGNvbnRyb2xsZXIgc3VwcG9ydHMgVVNCIDMuMCBzcGVjaWZpY2F0aW9uCj4gCj4gQmFzZWQg b24gd29yayBieSBBbmRyZXcgQnJlc3RpY2tlciA8YWJyZXN0aWNAY2hyb21pdW0ub3JnPi4KPiAK PiBTaWduZWQtb2ZmLWJ5OiBOYWdhcmp1bmEgS3Jpc3RhbSA8bmtyaXN0YW1AbnZpZGlhLmNvbT4K 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[46.91.239.54]) by smtp.gmail.com with ESMTPSA id d10sm5124454wmb.15.2019.04.25.06.57.28 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 25 Apr 2019 06:57:28 -0700 (PDT) Date: Thu, 25 Apr 2019 15:57:26 +0200 From: Thierry Reding To: Nagarjuna Kristam Cc: balbi@kernel.org, gregkh@linuxfoundation.org, jonathanh@nvidia.com, linux-tegra@vger.kernel.org, linux-usb@vger.kernel.org Subject: Re: [PATCH V2 4/8] dt-bindings: usb: Add NVIDIA Tegra XUSB device mode controller binding Message-ID: <20190425135726.GB24213@ulmo> References: <1552302716-18554-1-git-send-email-nkristam@nvidia.com> <1552302716-18554-5-git-send-email-nkristam@nvidia.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="dTy3Mrz/UPE2dbVg" Content-Disposition: inline In-Reply-To: <1552302716-18554-5-git-send-email-nkristam@nvidia.com> User-Agent: Mutt/1.11.4 (2019-03-13) Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Message-ID: <20190425135726.nGMX0GCEMeGWAvT61h6FvxGskBPRV6ocq7dhICHI6uc@z> --dTy3Mrz/UPE2dbVg Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Mon, Mar 11, 2019 at 04:41:52PM +0530, Nagarjuna Kristam wrote: > Add device-tree binding documentation for the XUSB device mode controller > present on tegra210 SoC. This controller supports USB 3.0 specification >=20 > Based on work by Andrew Bresticker . >=20 > Signed-off-by: Nagarjuna Kristam > --- > .../devicetree/bindings/usb/nvidia,tegra-xudc.txt | 105 +++++++++++++++= ++++++ > 1 file changed, 105 insertions(+) > create mode 100644 Documentation/devicetree/bindings/usb/nvidia,tegra-xu= dc.txt Hi Nagarjuna, when you resend this, make sure to Cc devicetree@vger.kernel.org on this patch. We need review from one of the device tree bindings maintainers before this can be applied, and they won't review if they don't receive the patch. =3D) Thierry >=20 > diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra-xudc.txt = b/Documentation/devicetree/bindings/usb/nvidia,tegra-xudc.txt > new file mode 100644 > index 0000000..990655d > --- /dev/null > +++ b/Documentation/devicetree/bindings/usb/nvidia,tegra-xudc.txt > @@ -0,0 +1,105 @@ > +Device tree binding for NVIDIA Tegra XUSB device mode controller (XUDC) > +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > + > +The Tegra XUDC controller supports both USB 2.0 HighSpeed/FullSpeed and > +USB 3.0 SuperSpeed protocols. > + > +Required properties: > +-------------------- > +- compatible: For Tegra210, must contain "nvidia,tegra210-xudc". > +- reg: Must contain the base and length of the XUSB device registers, XU= SB device > + PCI Config registers and XUSB device controller registers. > +- interrupts: Must contain the XUSB device interrupt > +- clocks: Must contain an entry for ell clocks used. > + See ../clock/clock-bindings.txt for details. > +- clock-names: Must include the following entries: > + - xusb_device > + - xusb_ss > + - xusb_ss_src > + - xusb_hs_src > + - xusb_fs_src > +- nvidia,xusb-padctl: phandle to the XUSB pad controller that is used to > + configure the USB pads used by the XUDC controller > +- power-domains: A list of PM domain specifiers that reference each powe= r-domain > + used by the XUSB device mode controller. This list must comprise of a = specifier > + for the XUSBA and XUSBB power-domains. See ../power/power_domain.txt a= nd > + ../arm/tegra/nvidia,tegra20-pmc.txt for details. > +- power-domain-names: A list of names that represent each of the specifi= ers in > + the 'power-domains' property. Must include 'xusb_ss' and 'xusb_device' > + > +For Tegra210: > +- avddio-usb-supply: PCIe/USB3 analog logic power supply. Must supply 1.= 05 V. > +- hvdd-usb-supply: USB controller power supply. Must supply 3.3 V. > +- avdd-pll-utmip-supply: UTMI PLL power supply. Must supply 1.8 V. > + > +- phys: Must contain an entry for each entry in phy-names. > + See ../phy/phy-bindings.txt for details. > +- extcon-usb: Must contains an extcon-usb entry which detects > + USB VBUS pin. See ../extcon/extcon-usb-gpio.txt for details. > + > +Optional properties: > +-------------------- > +- phy-names: Should include an entry for each PHY used by the controller. > + Names must be "usb2", and "usb3" if support SuperSpeed device mode. > + - "usb3" phy, SuperSpeed (SSTX+/SSTX-/SSRX+/SSRX-) data lines > + - "usb2" phy, USB 2.0 (D+/D-) data lines > + > +Example: > +-------- > + pmc: pmc@7000e400 { > + compatible =3D "nvidia,tegra210-pmc"; > + reg =3D <0x0 0x7000e400 0x0 0x400>; > + clocks =3D <&tegra_car TEGRA210_CLK_PCLK>, <&clk32k_in>; > + clock-names =3D "pclk", "clk32k_in"; > + > + powergates { > + pd_xusbss: xusba { > + clocks =3D <&tegra_car TEGRA210_CLK_XUSB_SS>; > + resets =3D <&tegra_car TEGRA210_CLK_XUSB_SS>; > + #power-domain-cells =3D <0>; > + }; > + > + pd_xusbdev: xusbb { > + clocks =3D <&tegra_car TEGRA210_CLK_XUSB_DEV>; > + resets =3D <&tegra_car 95>; > + #power-domain-cells =3D <0>; > + }; > + }; > + }; > + > + xudc@700d0000 { > + compatible =3D "nvidia,tegra210-xudc"; > + reg =3D <0x0 0x700d0000 0x0 0x8000>, > + <0x0 0x700d8000 0x0 0x1000>, > + <0x0 0x700d9000 0x0 0x1000>; > + > + interrupts =3D <0 44 0x4>; > + > + clocks =3D <&tegra_car TEGRA210_CLK_XUSB_DEV>, > + <&tegra_car TEGRA210_CLK_XUSB_SS>, > + <&tegra_car TEGRA210_CLK_XUSB_SSP_SRC>, > + <&tegra_car TEGRA210_CLK_XUSB_HS_SRC>, > + <&tegra_car TEGRA210_CLK_XUSB_FS_SRC>; > + clock-names =3D "xusb_device", "xusb_ss", "xusb_ss_src", > + "xusb_hs_src", "xusb_fs_src"; > + > + power-domains =3D <&pd_xusbdev>, <&pd_xusbss>; > + power-domain-names =3D "xusb_device", "xusb_ss"; > + > + nvidia,xusb-padctl =3D <&padctl>; > + > + phys =3D <&{/padctl@7009f000/pads/usb2/lanes/usb2-0}>; > + phy-names =3D "usb2; > + > + avddio-usb-supply =3D <&vdd_pex_1v05>; > + hvdd-usb-supply =3D <&vdd_3v3_sys>; > + avdd-pll-utmip-supply =3D <&vdd_1v8>; > + > + extcon =3D <&extcon_usb>; > + }; > + > + extcon_usb: extcon_vbus { > + compatible =3D "linux,extcon-usb-gpio"; > + vbus-gpio =3D <&gpio TEGRA_GPIO(Z, 0) GPIO_ACTIVE_LOW>; > + }; > + > --=20 > 2.7.4 >=20 --dTy3Mrz/UPE2dbVg Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAlzBvMYACgkQ3SOs138+ s6H9VA/+PNz0M20JK0uHeUWb2dGMAClmagdzP6QDEi6/br2sf8EqV5yTzG+MXWxQ 9zEl3nwoZ4/6x91Gg/iEqLekPhphCObffekVYH0UA5Ss701ibOQ9/wYub9Q7R3B4 8aALsoZGOEX0m5AeFU00HgF52kLi+C+shqHrBbq8kIgGRY7wtSsDDLBbUuQ1TwiZ 7qsSq82mXCwGw/jZWxmHY0zDuTzGBJwRSqWc1jkLTQHql0noUtj1b3B/KU7St4iX 6e+a0Hdo+NpJF1W0vDrJiyj8Sem3Uc78g07cx+hc40WiHBFA/15afvf91lE0y9vU nyVwVKxDeS+Ehu1kuTIG/R/n7czlcDNzbmUZgLCaz041FpR7h8EX+4aSSr8RIRyR xFWbbPHSciVFwBV8Mp1YZeDSl8UhG6CMR+JAMpW4rdXyGjYbu4vmnaHHa2Y9jxFQ Ppw4hS3Yh7O3wAsDs9thOdVb65rDbyWmd9U1TGToPDxV4XB6bV/USsKFVn/xokJZ UMks/bRGsT7r9xGX4Nsnt1cdpVrDgEAkzwTxReTbQB7Hgbv/ef+16A13tAP772yn wb6c5E94sg/CSIy9rfsxAqOFdp7/UICpSzXZYdyU+xLx+jAY98xxgbVRQ+VnFFiN /RJQbtsCNpoSSvlker1ZOWSg9wic9+6WQPEdDiEjdn2C18eji/8= =/Pdm -----END PGP SIGNATURE----- --dTy3Mrz/UPE2dbVg--