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[78.11.189.27]) by smtp.googlemail.com with ESMTPSA id p41-20020a05651213a900b00443fac7d6ffsm876979lfa.108.2022.03.18.07.40.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Mar 2022 07:40:34 -0700 (PDT) Date: Fri, 18 Mar 2022 15:40:31 +0100 From: Krzysztof Kozlowski To: Dinh Nguyen Cc: hminas@synopsys.com, gregkh@linuxfoundation.org, robh+dt@kernel.org, linux-usb@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH 1/3] dt-bindings: usb: dwc2: add compatible "intel,socfpga-agilex-hsotg" Message-ID: <20220318144031.ap75e5sjk5fa6ghv@krzk-bin> References: <20220125161821.1951906-1-dinguyen@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20220125161821.1951906-1-dinguyen@kernel.org> Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org On Tue, Jan 25, 2022 at 10:18:19AM -0600, Dinh Nguyen wrote: > Add the compatible "intel,socfpga-agilex-hsotg" to the DWC2 > implementation, because the Agilex DWC2 implementation does not support > clock gating. > > Signed-off-by: Dinh Nguyen > --- > Documentation/devicetree/bindings/usb/dwc2.yaml | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/Documentation/devicetree/bindings/usb/dwc2.yaml b/Documentation/devicetree/bindings/usb/dwc2.yaml > index f00867ebc147..481aaa09f3f2 100644 > --- a/Documentation/devicetree/bindings/usb/dwc2.yaml > +++ b/Documentation/devicetree/bindings/usb/dwc2.yaml > @@ -53,6 +53,7 @@ properties: > - const: st,stm32mp15-hsotg > - const: snps,dwc2 > - const: samsung,s3c6400-hsotg > + - const: intel,socfpga-agilex-hsotg This is confusing and wrong. Now the intel,socfpga-agilex-hsotg is mentioned twice - with and without snps,dwc2. The DTS change in this patchset added usage with snps,dwc2. The commit msg says it's different, but is the difference incompatible? Please clarify the AgileX HSOTG - is it compatible with snps,dwc2 or not? Based on this the patch might need to be reverted (or changed). Best regards, Krzysztof