* [PATCH] usb: host: Add a quirk for writing ERST in high-low order [not found] <CGME20240528055659epcas2p4f86642d6647855747cea35b04f8a46cc@epcas2p4.samsung.com> @ 2024-05-28 5:57 ` Daehwan Jung 2024-05-28 7:23 ` Greg Kroah-Hartman 0 siblings, 1 reply; 6+ messages in thread From: Daehwan Jung @ 2024-05-28 5:57 UTC (permalink / raw) To: Mathias Nyman, Greg Kroah-Hartman Cc: open list:USB XHCI DRIVER, open list, Thinh Nguyen, Daehwan Jung [Synopsys]- The host controller was design to support ERST setting during the RUN state. But since there is a limitation in controller in supporting separate ERSTBA_HI and ERSTBA_LO programming, It is supported when the ERSTBA is programmed in 64bit, or in 32 bit mode ERSTBA_HI before ERSTBA_LO [Synopsys]- The internal initialization of event ring fetches the "Event Ring Segment Table Entry" based on the indication of ERSTBA_LO written. Signed-off-by: Daehwan Jung <dh10.jung@samsung.com> --- drivers/usb/host/xhci-mem.c | 5 ++++- drivers/usb/host/xhci.h | 2 ++ 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c index 3100219..ef768e6 100644 --- a/drivers/usb/host/xhci-mem.c +++ b/drivers/usb/host/xhci-mem.c @@ -2325,7 +2325,10 @@ xhci_add_interrupter(struct xhci_hcd *xhci, struct xhci_interrupter *ir, erst_base = xhci_read_64(xhci, &ir->ir_set->erst_base); erst_base &= ERST_BASE_RSVDP; erst_base |= ir->erst.erst_dma_addr & ~ERST_BASE_RSVDP; - xhci_write_64(xhci, erst_base, &ir->ir_set->erst_base); + if (xhci->quirks & XHCI_WRITE_64_HI_LO) + hi_lo_writeq(erst_base, &ir->ir_set->erst_base); + else + xhci_write_64(xhci, erst_base, &ir->ir_set->erst_base); /* Set the event ring dequeue address of this interrupter */ xhci_set_hc_event_deq(xhci, ir); diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h index 3041515..8664dd1 100644 --- a/drivers/usb/host/xhci.h +++ b/drivers/usb/host/xhci.h @@ -17,6 +17,7 @@ #include <linux/kernel.h> #include <linux/usb/hcd.h> #include <linux/io-64-nonatomic-lo-hi.h> +#include <linux/io-64-nonatomic-hi-lo.h> /* Code sharing between pci-quirks and xhci hcd */ #include "xhci-ext-caps.h" @@ -1627,6 +1628,7 @@ struct xhci_hcd { #define XHCI_RESET_TO_DEFAULT BIT_ULL(44) #define XHCI_ZHAOXIN_TRB_FETCH BIT_ULL(45) #define XHCI_ZHAOXIN_HOST BIT_ULL(46) +#define XHCI_WRITE_64_HI_LO BIT_ULL(47) unsigned int num_active_eps; unsigned int limit_active_eps; -- 2.7.4 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH] usb: host: Add a quirk for writing ERST in high-low order 2024-05-28 5:57 ` [PATCH] usb: host: Add a quirk for writing ERST in high-low order Daehwan Jung @ 2024-05-28 7:23 ` Greg Kroah-Hartman 2024-05-28 7:29 ` Greg Kroah-Hartman 2024-05-28 7:30 ` Greg Kroah-Hartman 0 siblings, 2 replies; 6+ messages in thread From: Greg Kroah-Hartman @ 2024-05-28 7:23 UTC (permalink / raw) To: Daehwan Jung Cc: Mathias Nyman, open list:USB XHCI DRIVER, open list, Thinh Nguyen On Tue, May 28, 2024 at 02:57:16PM +0900, Daehwan Jung wrote: > [Synopsys]- The host controller was design to support ERST setting > during the RUN state. But since there is a limitation in controller > in supporting separate ERSTBA_HI and ERSTBA_LO programming, > It is supported when the ERSTBA is programmed in 64bit, > or in 32 bit mode ERSTBA_HI before ERSTBA_LO > > [Synopsys]- The internal initialization of event ring fetches > the "Event Ring Segment Table Entry" based on the indication of > ERSTBA_LO written. > > Signed-off-by: Daehwan Jung <dh10.jung@samsung.com> > --- > drivers/usb/host/xhci-mem.c | 5 ++++- > drivers/usb/host/xhci.h | 2 ++ > 2 files changed, 6 insertions(+), 1 deletion(-) > > diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c > index 3100219..ef768e6 100644 > --- a/drivers/usb/host/xhci-mem.c > +++ b/drivers/usb/host/xhci-mem.c > @@ -2325,7 +2325,10 @@ xhci_add_interrupter(struct xhci_hcd *xhci, struct xhci_interrupter *ir, > erst_base = xhci_read_64(xhci, &ir->ir_set->erst_base); > erst_base &= ERST_BASE_RSVDP; > erst_base |= ir->erst.erst_dma_addr & ~ERST_BASE_RSVDP; > - xhci_write_64(xhci, erst_base, &ir->ir_set->erst_base); > + if (xhci->quirks & XHCI_WRITE_64_HI_LO) > + hi_lo_writeq(erst_base, &ir->ir_set->erst_base); > + else > + xhci_write_64(xhci, erst_base, &ir->ir_set->erst_base); > > /* Set the event ring dequeue address of this interrupter */ > xhci_set_hc_event_deq(xhci, ir); > diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h > index 3041515..8664dd1 100644 > --- a/drivers/usb/host/xhci.h > +++ b/drivers/usb/host/xhci.h > @@ -17,6 +17,7 @@ > #include <linux/kernel.h> > #include <linux/usb/hcd.h> > #include <linux/io-64-nonatomic-lo-hi.h> > +#include <linux/io-64-nonatomic-hi-lo.h> > > /* Code sharing between pci-quirks and xhci hcd */ > #include "xhci-ext-caps.h" > @@ -1627,6 +1628,7 @@ struct xhci_hcd { > #define XHCI_RESET_TO_DEFAULT BIT_ULL(44) > #define XHCI_ZHAOXIN_TRB_FETCH BIT_ULL(45) > #define XHCI_ZHAOXIN_HOST BIT_ULL(46) > +#define XHCI_WRITE_64_HI_LO BIT_ULL(47) > > unsigned int num_active_eps; > unsigned int limit_active_eps; > -- > 2.7.4 > > Hi, This is the friendly patch-bot of Greg Kroah-Hartman. You have sent him a patch that has triggered this response. He used to manually respond to these common problems, but in order to save his sanity (he kept writing the same thing over and over, yet to different people), I was created. Hopefully you will not take offence and will fix the problem in your patch and resubmit it so that it can be accepted into the Linux kernel tree. You are receiving this message because of the following common error(s) as indicated below: - This looks like a new version of a previously submitted patch, but you did not list below the --- line any changes from the previous version. Please read the section entitled "The canonical patch format" in the kernel file, Documentation/process/submitting-patches.rst for what needs to be done here to properly describe this. If you wish to discuss this problem further, or you have questions about how to resolve this issue, please feel free to respond to this email and Greg will reply once he has dug out from the pending patches received from other developers. thanks, greg k-h's patch email bot ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] usb: host: Add a quirk for writing ERST in high-low order 2024-05-28 7:23 ` Greg Kroah-Hartman @ 2024-05-28 7:29 ` Greg Kroah-Hartman 2024-05-30 7:40 ` Jung Daehwan 2024-05-28 7:30 ` Greg Kroah-Hartman 1 sibling, 1 reply; 6+ messages in thread From: Greg Kroah-Hartman @ 2024-05-28 7:29 UTC (permalink / raw) To: Daehwan Jung Cc: Mathias Nyman, open list:USB XHCI DRIVER, open list, Thinh Nguyen On Tue, May 28, 2024 at 09:23:43AM +0200, Greg Kroah-Hartman wrote: > On Tue, May 28, 2024 at 02:57:16PM +0900, Daehwan Jung wrote: > > [Synopsys]- The host controller was design to support ERST setting > > during the RUN state. But since there is a limitation in controller > > in supporting separate ERSTBA_HI and ERSTBA_LO programming, > > It is supported when the ERSTBA is programmed in 64bit, > > or in 32 bit mode ERSTBA_HI before ERSTBA_LO > > > > [Synopsys]- The internal initialization of event ring fetches > > the "Event Ring Segment Table Entry" based on the indication of > > ERSTBA_LO written. Also, what is the "[Synopsys]-" stuff? That's not normally in our changelogs or documentation for how to write a changelog text, is it? thanks, greg k-h ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] usb: host: Add a quirk for writing ERST in high-low order 2024-05-28 7:29 ` Greg Kroah-Hartman @ 2024-05-30 7:40 ` Jung Daehwan 0 siblings, 0 replies; 6+ messages in thread From: Jung Daehwan @ 2024-05-30 7:40 UTC (permalink / raw) To: Greg Kroah-Hartman Cc: Mathias Nyman, open list:USB XHCI DRIVER, open list, Thinh Nguyen [-- Attachment #1: Type: text/plain, Size: 926 bytes --] On Tue, May 28, 2024 at 09:29:21AM +0200, Greg Kroah-Hartman wrote: > On Tue, May 28, 2024 at 09:23:43AM +0200, Greg Kroah-Hartman wrote: > > On Tue, May 28, 2024 at 02:57:16PM +0900, Daehwan Jung wrote: > > > [Synopsys]- The host controller was design to support ERST setting > > > during the RUN state. But since there is a limitation in controller > > > in supporting separate ERSTBA_HI and ERSTBA_LO programming, > > > It is supported when the ERSTBA is programmed in 64bit, > > > or in 32 bit mode ERSTBA_HI before ERSTBA_LO > > > > > > [Synopsys]- The internal initialization of event ring fetches > > > the "Event Ring Segment Table Entry" based on the indication of > > > ERSTBA_LO written. > > Also, what is the "[Synopsys]-" stuff? That's not normally in our > changelogs or documentation for how to write a changelog text, is it? > > thanks, > > greg k-h > Yes, I will modify it. Best Regards, Jung Daehwan [-- Attachment #2: Type: text/plain, Size: 0 bytes --] ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] usb: host: Add a quirk for writing ERST in high-low order 2024-05-28 7:23 ` Greg Kroah-Hartman 2024-05-28 7:29 ` Greg Kroah-Hartman @ 2024-05-28 7:30 ` Greg Kroah-Hartman 2024-05-28 8:58 ` Jung Daehwan 1 sibling, 1 reply; 6+ messages in thread From: Greg Kroah-Hartman @ 2024-05-28 7:30 UTC (permalink / raw) To: Daehwan Jung Cc: Mathias Nyman, open list:USB XHCI DRIVER, open list, Thinh Nguyen On Tue, May 28, 2024 at 09:23:43AM +0200, Greg Kroah-Hartman wrote: > On Tue, May 28, 2024 at 02:57:16PM +0900, Daehwan Jung wrote: > > [Synopsys]- The host controller was design to support ERST setting > > during the RUN state. But since there is a limitation in controller > > in supporting separate ERSTBA_HI and ERSTBA_LO programming, > > It is supported when the ERSTBA is programmed in 64bit, > > or in 32 bit mode ERSTBA_HI before ERSTBA_LO > > > > [Synopsys]- The internal initialization of event ring fetches > > the "Event Ring Segment Table Entry" based on the indication of > > ERSTBA_LO written. > > > > Signed-off-by: Daehwan Jung <dh10.jung@samsung.com> > > --- > > drivers/usb/host/xhci-mem.c | 5 ++++- > > drivers/usb/host/xhci.h | 2 ++ > > 2 files changed, 6 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c > > index 3100219..ef768e6 100644 > > --- a/drivers/usb/host/xhci-mem.c > > +++ b/drivers/usb/host/xhci-mem.c > > @@ -2325,7 +2325,10 @@ xhci_add_interrupter(struct xhci_hcd *xhci, struct xhci_interrupter *ir, > > erst_base = xhci_read_64(xhci, &ir->ir_set->erst_base); > > erst_base &= ERST_BASE_RSVDP; > > erst_base |= ir->erst.erst_dma_addr & ~ERST_BASE_RSVDP; > > - xhci_write_64(xhci, erst_base, &ir->ir_set->erst_base); > > + if (xhci->quirks & XHCI_WRITE_64_HI_LO) > > + hi_lo_writeq(erst_base, &ir->ir_set->erst_base); > > + else > > + xhci_write_64(xhci, erst_base, &ir->ir_set->erst_base); > > > > /* Set the event ring dequeue address of this interrupter */ > > xhci_set_hc_event_deq(xhci, ir); > > diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h > > index 3041515..8664dd1 100644 > > --- a/drivers/usb/host/xhci.h > > +++ b/drivers/usb/host/xhci.h > > @@ -17,6 +17,7 @@ > > #include <linux/kernel.h> > > #include <linux/usb/hcd.h> > > #include <linux/io-64-nonatomic-lo-hi.h> > > +#include <linux/io-64-nonatomic-hi-lo.h> Why not put this in the .c file? > > /* Code sharing between pci-quirks and xhci hcd */ > > #include "xhci-ext-caps.h" > > @@ -1627,6 +1628,7 @@ struct xhci_hcd { > > #define XHCI_RESET_TO_DEFAULT BIT_ULL(44) > > #define XHCI_ZHAOXIN_TRB_FETCH BIT_ULL(45) > > #define XHCI_ZHAOXIN_HOST BIT_ULL(46) > > +#define XHCI_WRITE_64_HI_LO BIT_ULL(47) Note, you define this, and check it, but it is never set, so this patch is useless on its own and so we can not accept it as-is at all. How was this tested? thanks, greg k-h ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] usb: host: Add a quirk for writing ERST in high-low order 2024-05-28 7:30 ` Greg Kroah-Hartman @ 2024-05-28 8:58 ` Jung Daehwan 0 siblings, 0 replies; 6+ messages in thread From: Jung Daehwan @ 2024-05-28 8:58 UTC (permalink / raw) To: Greg Kroah-Hartman Cc: Mathias Nyman, open list:USB XHCI DRIVER, open list, Thinh Nguyen [-- Attachment #1: Type: text/plain, Size: 2947 bytes --] On Tue, May 28, 2024 at 09:30:34AM +0200, Greg Kroah-Hartman wrote: > On Tue, May 28, 2024 at 09:23:43AM +0200, Greg Kroah-Hartman wrote: > > On Tue, May 28, 2024 at 02:57:16PM +0900, Daehwan Jung wrote: > > > [Synopsys]- The host controller was design to support ERST setting > > > during the RUN state. But since there is a limitation in controller > > > in supporting separate ERSTBA_HI and ERSTBA_LO programming, > > > It is supported when the ERSTBA is programmed in 64bit, > > > or in 32 bit mode ERSTBA_HI before ERSTBA_LO > > > > > > [Synopsys]- The internal initialization of event ring fetches > > > the "Event Ring Segment Table Entry" based on the indication of > > > ERSTBA_LO written. > > > > > > Signed-off-by: Daehwan Jung <dh10.jung@samsung.com> > > > --- > > > drivers/usb/host/xhci-mem.c | 5 ++++- > > > drivers/usb/host/xhci.h | 2 ++ > > > 2 files changed, 6 insertions(+), 1 deletion(-) > > > > > > diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c > > > index 3100219..ef768e6 100644 > > > --- a/drivers/usb/host/xhci-mem.c > > > +++ b/drivers/usb/host/xhci-mem.c > > > @@ -2325,7 +2325,10 @@ xhci_add_interrupter(struct xhci_hcd *xhci, struct xhci_interrupter *ir, > > > erst_base = xhci_read_64(xhci, &ir->ir_set->erst_base); > > > erst_base &= ERST_BASE_RSVDP; > > > erst_base |= ir->erst.erst_dma_addr & ~ERST_BASE_RSVDP; > > > - xhci_write_64(xhci, erst_base, &ir->ir_set->erst_base); > > > + if (xhci->quirks & XHCI_WRITE_64_HI_LO) > > > + hi_lo_writeq(erst_base, &ir->ir_set->erst_base); > > > + else > > > + xhci_write_64(xhci, erst_base, &ir->ir_set->erst_base); > > > > > > /* Set the event ring dequeue address of this interrupter */ > > > xhci_set_hc_event_deq(xhci, ir); > > > diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h > > > index 3041515..8664dd1 100644 > > > --- a/drivers/usb/host/xhci.h > > > +++ b/drivers/usb/host/xhci.h > > > @@ -17,6 +17,7 @@ > > > #include <linux/kernel.h> > > > #include <linux/usb/hcd.h> > > > #include <linux/io-64-nonatomic-lo-hi.h> > > > +#include <linux/io-64-nonatomic-hi-lo.h> > > Why not put this in the .c file? I add it following similar header file. #include <linux/io-64-nonatomic-lo-hi.h> Do you think it should be put in .c file because .c file only uses it? If so, I will modify it in the next submission. > > > > /* Code sharing between pci-quirks and xhci hcd */ > > > #include "xhci-ext-caps.h" > > > @@ -1627,6 +1628,7 @@ struct xhci_hcd { > > > #define XHCI_RESET_TO_DEFAULT BIT_ULL(44) > > > #define XHCI_ZHAOXIN_TRB_FETCH BIT_ULL(45) > > > #define XHCI_ZHAOXIN_HOST BIT_ULL(46) > > > +#define XHCI_WRITE_64_HI_LO BIT_ULL(47) > > Note, you define this, and check it, but it is never set, so this patch > is useless on its own and so we can not accept it as-is at all. > > How was this tested? I got it. I will add other patches and send the patchset. > > thanks, > > greg k-h > [-- Attachment #2: Type: text/plain, Size: 0 bytes --] ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2024-05-30 7:40 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
[not found] <CGME20240528055659epcas2p4f86642d6647855747cea35b04f8a46cc@epcas2p4.samsung.com>
2024-05-28 5:57 ` [PATCH] usb: host: Add a quirk for writing ERST in high-low order Daehwan Jung
2024-05-28 7:23 ` Greg Kroah-Hartman
2024-05-28 7:29 ` Greg Kroah-Hartman
2024-05-30 7:40 ` Jung Daehwan
2024-05-28 7:30 ` Greg Kroah-Hartman
2024-05-28 8:58 ` Jung Daehwan
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox; as well as URLs for NNTP newsgroup(s).