From: Francesco Dolcini <francesco@dolcini.it>
To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Francesco Dolcini <francesco.dolcini@toradex.com>
Cc: Parth Pancholi <parth.pancholi@toradex.com>,
linux-usb@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: [PATCH v1 1/2] dt-bindings: usb: add TUSB73x0 PCIe
Date: Fri, 4 Oct 2024 14:45:20 +0200 [thread overview]
Message-ID: <20241004124521.53442-2-francesco@dolcini.it> (raw)
In-Reply-To: <20241004124521.53442-1-francesco@dolcini.it>
From: Parth Pancholi <parth.pancholi@toradex.com>
Add device tree bindings for TI's TUSB73x0 PCIe-to-USB 3.0 xHCI
host controller. The controller supports software configuration
through PCIe registers, such as controlling the PWRONx polarity
via the USB control register (E0h).
Similar generic PCIe-based bindings can be found as qcom,ath11k-pci.yaml
as an example.
Datasheet: https://www.ti.com/lit/ds/symlink/tusb7320.pdf
Signed-off-by: Parth Pancholi <parth.pancholi@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
---
.../bindings/usb/ti,tusb73x0-pci.yaml | 60 +++++++++++++++++++
1 file changed, 60 insertions(+)
create mode 100644 Documentation/devicetree/bindings/usb/ti,tusb73x0-pci.yaml
diff --git a/Documentation/devicetree/bindings/usb/ti,tusb73x0-pci.yaml b/Documentation/devicetree/bindings/usb/ti,tusb73x0-pci.yaml
new file mode 100644
index 000000000000..bcb619b08ad3
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/ti,tusb73x0-pci.yaml
@@ -0,0 +1,60 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/usb/ti,tusb73x0-pci.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: TUSB73x0 USB 3.0 xHCI Host Controller (PCIe)
+
+maintainers:
+ - Francesco Dolcini <francesco.dolcini@toradex.com>
+
+description:
+ TUSB73x0 USB 3.0 xHCI Host Controller via PCIe x1 Gen2 interface.
+ The TUSB7320 supports up to two downstream ports, the TUSB7340 supports up
+ to four downstream ports.
+
+properties:
+ compatible:
+ const: pci104C,8241
+
+ reg:
+ maxItems: 1
+
+ ti,tusb7320-pwron-polarity-invert:
+ type: boolean
+ description:
+ Configure the polarity of the PWRONx# signals. When this is false, the PWRONx#
+ pins are active low and their internal pull-down resistors are enabled.
+ When this is true, the PWRONx# pins are active high and their internal pull-down
+ resistors are disabled.
+
+required:
+ - compatible
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ pcie {
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ pcie@0 {
+ device_type = "pci";
+ reg = <0x0 0x0 0x0 0x0 0x0>;
+ bus-range = <0x01 0xff>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
+
+ usb@0 {
+ compatible = "pci104C,8241";
+ reg = <0x10000 0x0 0x0 0x0 0x0>;
+
+ ti,tusb7320-pwron-polarity-invert;
+ };
+ };
+ };
--
2.39.5
next prev parent reply other threads:[~2024-10-04 12:45 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-04 12:45 [PATCH v1 0/2] USB: xhci: add support for PWRON polarity invert (TI TUSB73x0) Francesco Dolcini
2024-10-04 12:45 ` Francesco Dolcini [this message]
2024-10-04 15:23 ` [PATCH v1 1/2] dt-bindings: usb: add TUSB73x0 PCIe Conor Dooley
2024-10-04 15:31 ` Francesco Dolcini
2024-10-04 16:02 ` Conor Dooley
2024-10-04 12:45 ` [PATCH v1 2/2] USB: xhci: add support for PWRON polarity invert Francesco Dolcini
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