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Thu, 18 Dec 2025 16:21:04 +0100 (CET) From: Alexander Stein To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , Peter Chen , Pawel Laszczak , Roger Quadros , Greg Kroah-Hartman , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Magnus Damm , Marek Vasut Cc: Alexander Stein , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-usb@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux@ew.tq-group.com Subject: [PATCH 0/6] Support TQMa8QM Date: Thu, 18 Dec 2025 16:20:47 +0100 Message-ID: <20251218152058.1521806-1-alexander.stein@ew.tq-group.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-cloud-security-sender:alexander.stein@ew.tq-group.com X-cloud-security-recipient:linux-usb@vger.kernel.org X-cloud-security-crypt: load encryption module X-cloud-security-Mailarchiv: E-Mail archived for: alexander.stein@ew.tq-group.com X-cloud-security-Mailarchivtype:outbound X-cloud-security-Virusscan:CLEAN X-cloud-security-disclaimer: This E-Mail was scanned by E-Mailservice on mx-relay10-hz2.antispameurope.com with 4dXDrx4SHSz4F929 X-cloud-security-connect: he-nlb01-hz1.hornetsecurity.com[94.100.132.6], TLS=1, IP=94.100.132.6 X-cloud-security-Digest:836eb70413c5acce62e457440dd9da8d X-cloud-security:scantime:4.420 DKIM-Signature: a=rsa-sha256; bh=7AMuBMEfhIQw9FVyiKx57RUqUljgR4wYmPvn8hqi5T4=; c=relaxed/relaxed; d=ew.tq-group.com; h=content-type:mime-version:subject:from:to:message-id:date; s=hse1; t=1766071302; v=1; b=FYP8ZSVDSwP/ymeVJgrWOk1Wif4sC2r9iUUhRKpaLkZW3KigzwF64LmSeobZ1VV3AkTz/S8f lCTHOfb5vwHjyO8RBQ8QMNRk+oA7QN3JM0rTSbia5mYKI1Bi9+CuECef28FgjRJgB/Kz5boCjwv oo1o4TFwScJmi62SqAX7ZFoYYW7GVzOGO68XCfQTMR8tb+xvngDw/ebIySMIBMOCfdFAN+80kAW Up7hT6LcTcAMdN5yMrSvIFCN7LbC2i1KTMgAKuzer2khTQ4AlPvzuZLCOHlVq03A0VaNyL3p09c nmLED01RCWsYP3vzLgINwh9US2++hf/3bSa+1CtGTYcKA== Hi, this series adds support for TQ's TQMa8QM. The first 3 patches are prepatory: 1. Add support for clock-output-names for clk-renesas-pcie. This is necessary as clk-imx8qxp-lpcg.c (driver for phyx1 phyx2 clock gating) reqiures that property on the parent clock. 2. Add support for USB devices in cdns USB3 host controller, namely onboard-devices as USB hubs. Implemented similarily to snps,dwc3-common.yaml. 3. Add DMA IRQ for PCIe controller. Similar to commit 0b4c46f9ad79c ("arm64: dts: imx8qm-ss-hsio: Wire up DMA IRQ for PCIe") which was only tested on imx8qxp which just has one PCIe controller. 4 & 5. Device bindings and platform DT 6. Workaround for missing "ERR050104: Arm/A53: Cache coherency issue" workaround. See [1] for details. Split into separate commit for easy revert once an errata workaround has been integrated. Best regards, Alexander [1] https://lore.kernel.org/all/20230420112952.28340-1-iivanov@suse.de/ Alexander Stein (6): dt-bindings: clk: rs9: add clock-output-names property dt-bindings: usb: cdns,usb3: support USB devices in DT arm64: dts: imx8qm-ss-hsio: Wire up DMA IRQ for PCIe dt-bindings: arm: fsl: add bindings for TQMa8x arm64: dts: Add TQ imx8qm based board arm64: dts: imx8qm-tqma8qm-mba8x: Disable Cortex-A72 cluster .../devicetree/bindings/arm/fsl.yaml | 10 + .../bindings/clock/renesas,9series.yaml | 37 + .../devicetree/bindings/usb/cdns,usb3.yaml | 11 + arch/arm64/boot/dts/freescale/Makefile | 1 + .../boot/dts/freescale/imx8qm-ss-hsio.dtsi | 5 +- .../dts/freescale/imx8qm-tqma8qm-mba8x.dts | 869 ++++++++++++++++++ .../boot/dts/freescale/imx8qm-tqma8qm.dtsi | 322 +++++++ 7 files changed, 1253 insertions(+), 2 deletions(-) create mode 100644 arch/arm64/boot/dts/freescale/imx8qm-tqma8qm-mba8x.dts create mode 100644 arch/arm64/boot/dts/freescale/imx8qm-tqma8qm.dtsi -- 2.43.0