From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E8D204247CD; Thu, 8 Jan 2026 09:53:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767866009; cv=none; b=tb/JLLougLlJgew4ad4FWuS6zsT3gOCpyGnExUy12M+QZF+wRvg10WjdDjXwMI9FRyGxRCUPl0uIG4WewB+Q3KH5fQ3gqG6hpMr9elWNGtYoGpNqB7LnHaNZkeZQ6IMfYIXyD0G1MK6qkbOxoS2sjDHpjGbLCocqAer3bmuPpo4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767866009; c=relaxed/simple; bh=9nGfb2nb9qwAdK8ep4zjgYtfhP16TKJPZKiS1YSSzqM=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=Vj6xX8xqFs0lgoOBzSZ34Y3IzJKDWlrzbEzWzk5IRTZUnc4SI+I13ySOJGw4POUdDNJ948KIW4P7D/2m7eEFUxOOykpWUyuOXMo7HQ6/bQskF90k0XL3HUFDzN9of5oRYj7vPYDgMQt+K6ahIILr9rDwhexZYGPA1fGaRms/Dh0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=m52o3jYF; arc=none smtp.client-ip=198.175.65.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="m52o3jYF" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1767866000; x=1799402000; h=date:from:to:cc:subject:message-id:references: mime-version:content-transfer-encoding:in-reply-to; bh=9nGfb2nb9qwAdK8ep4zjgYtfhP16TKJPZKiS1YSSzqM=; b=m52o3jYFWsOcLaKGroI/prOMo9NWs9a3vOeCO1SoFgivXLEi2HJQ+b2J 8Kdq5SMYkVbr9oFjl/1PPQ+xuqdcDa67Fz+T+cfjgiThTHRMSycX5Ss63 bbyJzuPA08AdZZpq14CV97Zp7Kt6GnmqHgDVGZK+rRRwZtLEk4rcjdXch DgNQQ4bZZ9YvjD2+anLSnwBaiNpHwLs3tXV8FmhJL074wPxi/uLwIrSfr XKkmx+wSBpwFicMeDBTgRcM+aM3l6mhR6dITOmNtZCSRaIiAqOakSoocR yVsiHNGzrTyHNuOo28wklTcumuG9n6WK7lGJiSGPK6QwcWf7favYxjwop A==; X-CSE-ConnectionGUID: u+GEEWNQQrausqOuDbS8Ag== X-CSE-MsgGUID: x5HYxS9jQbykbyyygfKNoA== X-IronPort-AV: E=McAfee;i="6800,10657,11664"; a="69291040" X-IronPort-AV: E=Sophos;i="6.21,210,1763452800"; d="scan'208";a="69291040" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by orvoesa110.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2026 01:53:09 -0800 X-CSE-ConnectionGUID: e0n0ZgFpSO22RaTzTv9LXQ== X-CSE-MsgGUID: 75/h7ctORO282RVyHWr1Lg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,210,1763452800"; d="scan'208";a="233869142" Received: from black.igk.intel.com ([10.91.253.5]) by orviesa002.jf.intel.com with ESMTP; 08 Jan 2026 01:53:05 -0800 Received: by black.igk.intel.com (Postfix, from userid 1001) id F11E398; Thu, 08 Jan 2026 10:53:03 +0100 (CET) Date: Thu, 8 Jan 2026 10:53:03 +0100 From: Mika Westerberg To: Atharva Tiwari Cc: Bjorn Helgaas , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Mahesh J Salgaonkar , Oliver O'Halloran , Andreas Noever , Mika Westerberg , Yehezkel Bernat , Lukas Wunner , Kuppuswamy Sathyanarayanan , Feng Tang , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-usb@vger.kernel.org Subject: Re: [PATCH v4] PCI/portdev: Disable AER for Titan Ridge 4C 2018 Message-ID: <20260108095303.GQ2275908@black.igk.intel.com> References: <20260108082509.3028-1-atharvatiwarilinuxdev@gmail.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20260108082509.3028-1-atharvatiwarilinuxdev@gmail.com> On Thu, Jan 08, 2026 at 08:25:03AM +0000, Atharva Tiwari wrote: > Disable AER for Intel Titan Ridge 4C 2018 > (used in T2 iMacs, where the warnings appear) > that generate continuous pcieport warnings. such as: Did you try the v6.19-rcX as Lukas suggested? What was the result? I asked also to provide full dmesg and 'sudo lspci -vv' output but you did not provide them. You also did not provide details of what device you connect to this system. It would be good to try to understand what is going on before we add any quirks. > pcieport 0000:00:1c.4: AER: Correctable error message received from 0000:07:00.0 > pcieport 0000:07:00.0: PCIe Bus Error: severity=Correctable, type=Data Link Layer, (Receiver ID) > pcieport 0000:07:00.0: device [8086:15ea] error status/mask=00000080/00002000 > pcieport 0000:07:00.0: [ 7] BadDLLP > > macOS also disables AER for Thunderbolt devices and controllers in their drivers. > > Closes: https://bugzilla.kernel.org/show_bug.cgi?id=220651 > Signed-off-by: Atharva Tiwari > > --- > Chnages since v3: > - Fixed Grammer mistakes > Changes since v2: > - Transferred logic to arch/x86/pci/fixup.c to only target x86 > - Added DMI quirk to only target Apple Systems > Changes since v1: > - Transferred logic to drivers/pci/quicks.c > --- > --- > arch/x86/pci/fixup.c | 12 ++++++++++++ > drivers/pci/pcie/aer.c | 3 +++ > drivers/pci/pcie/portdrv.c | 2 +- > include/linux/pci.h | 1 + > 4 files changed, 17 insertions(+), 1 deletion(-) > > diff --git a/arch/x86/pci/fixup.c b/arch/x86/pci/fixup.c > index 25076a5acd96..bd72f7cf5db9 100644 > --- a/arch/x86/pci/fixup.c > +++ b/arch/x86/pci/fixup.c > @@ -1081,3 +1081,15 @@ static void quirk_tuxeo_rp_d3(struct pci_dev *pdev) > } > DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, 0x1502, quirk_tuxeo_rp_d3); > #endif /* CONFIG_SUSPEND */ > + > +#ifdef CONFIG_PCIEAER > + > +static void quirk_disable_aer(struct pci_dev *pdev) > +{ > + if (dmi_match(DMI_SYS_VENDOR, "Apple")) > + pdev->no_aer = 1; > +} > +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x15EA, quirk_disable_aer); > +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x15EB, quirk_disable_aer); > +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x15EC, quirk_disable_aer); Use small letters in hex: 0x15ea etc. > +#endif /* CONFIG_PCIEAER */ > diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c > index e0bcaa896803..45604564ce6f 100644 > --- a/drivers/pci/pcie/aer.c > +++ b/drivers/pci/pcie/aer.c > @@ -389,6 +389,9 @@ void pci_aer_init(struct pci_dev *dev) > { > int n; > > + if (dev->no_aer) > + return; > + > dev->aer_cap = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR); > if (!dev->aer_cap) > return; > diff --git a/drivers/pci/pcie/portdrv.c b/drivers/pci/pcie/portdrv.c > index 38a41ccf79b9..ab904a224296 100644 > --- a/drivers/pci/pcie/portdrv.c > +++ b/drivers/pci/pcie/portdrv.c > @@ -240,7 +240,7 @@ static int get_port_device_capability(struct pci_dev *dev) > if ((pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT || > pci_pcie_type(dev) == PCI_EXP_TYPE_RC_EC) && > dev->aer_cap && pci_aer_available() && > - (pcie_ports_native || host->native_aer)) > + (pcie_ports_native || host->native_aer) && !dev->no_aer) > services |= PCIE_PORT_SERVICE_AER; > #endif > > diff --git a/include/linux/pci.h b/include/linux/pci.h > index 864775651c6f..f447f86c6bdf 100644 > --- a/include/linux/pci.h > +++ b/include/linux/pci.h > @@ -440,6 +440,7 @@ struct pci_dev { > unsigned int multifunction:1; /* Multi-function device */ > > unsigned int is_busmaster:1; /* Is busmaster */ > + unsigned int no_aer:1; /* May not use AER */ > unsigned int no_msi:1; /* May not use MSI */ > unsigned int no_64bit_msi:1; /* May only use 32-bit MSIs */ > unsigned int block_cfg_access:1; /* Config space access blocked */ > -- > 2.43.0