[PATCH 0/5] CM fixes to follow CM guide more closely

[PATCH 0/5] CM fixes to follow CM guide more closely

[Gil Fine]

This series improves Connection Manager implementation to better align with
the CM Guide, including proper state checks, router ready verification, timeout
adjustments, and improved logging.

Gil Fine (5):
  thunderbolt: Fix lane bonding log message when bonding not possible
  thunderbolt: Verify PCIe adapters in detect state before setup PCIe
    tunnel
  thunderbolt: Verify Router Ready bit is set after router enumeration
  thunderbolt: Increase timeout to wait for Configuration Ready bit
  thunderbolt: Increase Notification Timeout to 255 ms for USB4 routers

 drivers/thunderbolt/switch.c  | 22 ++++++++++------------
 drivers/thunderbolt/tb.h      |  2 ++
 drivers/thunderbolt/tb_regs.h | 19 +++++++++++++++++--
 drivers/thunderbolt/tunnel.c  | 17 +++++++++++++++++
 drivers/thunderbolt/usb4.c    | 27 +++++++++++++++++++++++++--
 5 files changed, 71 insertions(+), 16 deletions(-)

-- 
2.43.0

[PATCH 1/5] thunderbolt: Fix lane bonding log message when bonding not possible

[Gil Fine]

Currently, if lane bonding is not possible or not supported, we continue
and read the updated number of Total Buffers from lane adapters without need,
and incorrectly log the bonding flow as succeeded even if it didn't.

Fix lane bonding log message when bonding not possible and bail out early.

Signed-off-by: Gil Fine <gil.fine@linux.intel.com>
---
 drivers/thunderbolt/switch.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/thunderbolt/switch.c b/drivers/thunderbolt/switch.c
index dda30e1d75e9..e7faa203b782 100644
--- a/drivers/thunderbolt/switch.c
+++ b/drivers/thunderbolt/switch.c
@@ -2953,14 +2953,14 @@ static int tb_switch_lane_bonding_enable(struct tb_switch *sw)
 	int ret;
 
 	if (!tb_switch_lane_bonding_possible(sw))
-		return 0;
+		return -EOPNOTSUPP;
 
 	up = tb_upstream_port(sw);
 	down = tb_switch_downstream_port(sw);
 
 	if (!tb_port_width_supported(up, TB_LINK_WIDTH_DUAL) ||
 	    !tb_port_width_supported(down, TB_LINK_WIDTH_DUAL))
-		return 0;
+		return -EOPNOTSUPP;
 
 	/*
 	 * Both lanes need to be in CL0. Here we assume lane 0 already be in
-- 
2.43.0

[PATCH 2/5] thunderbolt: Verify PCIe adapters in detect state before setup PCIe tunnel

[Gil Fine]

USB4 Connection Manager guide suggests making sure PCIe downstream and PCIe
upstream adapter is in Detect state, before set up a PCIe tunnel.

Add this step by checking LTSSM field in ADP_PCIE_CS_0 to follow the CM
guide more closely.

Signed-off-by: Gil Fine <gil.fine@linux.intel.com>
---
 drivers/thunderbolt/tb.h      |  2 ++
 drivers/thunderbolt/tb_regs.h | 15 +++++++++++++++
 drivers/thunderbolt/tunnel.c  | 17 +++++++++++++++++
 drivers/thunderbolt/usb4.c    | 23 +++++++++++++++++++++++
 4 files changed, 57 insertions(+)

diff --git a/drivers/thunderbolt/tb.h b/drivers/thunderbolt/tb.h
index c2ff2069eb20..dbbbd2bd63f3 100644
--- a/drivers/thunderbolt/tb.h
+++ b/drivers/thunderbolt/tb.h
@@ -1480,6 +1480,8 @@ int usb4_dp_port_allocate_bandwidth(struct tb_port *port, int bw);
 int usb4_dp_port_requested_bandwidth(struct tb_port *port);
 
 int usb4_pci_port_set_ext_encapsulation(struct tb_port *port, bool enable);
+int usb4_pci_port_check_ltssm_state(struct tb_port *port,
+				    enum tb_pcie_ltssm_state ltssm);
 
 static inline bool tb_is_usb4_port_device(const struct device *dev)
 {
diff --git a/drivers/thunderbolt/tb_regs.h b/drivers/thunderbolt/tb_regs.h
index c0bf136236e6..71bed02a6974 100644
--- a/drivers/thunderbolt/tb_regs.h
+++ b/drivers/thunderbolt/tb_regs.h
@@ -473,10 +473,25 @@ struct tb_regs_port_header {
 
 /* PCIe adapter registers */
 #define ADP_PCIE_CS_0				0x00
+#define ADP_PCIE_CS_0_LTSSM_MASK		GENMASK(28, 25)
 #define ADP_PCIE_CS_0_PE			BIT(31)
 #define ADP_PCIE_CS_1				0x01
 #define ADP_PCIE_CS_1_EE			BIT(0)
 
+enum tb_pcie_ltssm_state {
+	TB_PCIE_LTSSM_DETECT		= 0x0,
+	TB_PCIE_LTSSM_POLLING		= 0x1,
+	TB_PCIE_LTSSM_CONFIG		= 0x2,
+	TB_PCIE_LTSSM_CONFIG_IDLE	= 0x3,
+	TB_PCIE_LTSSM_RECOVERY		= 0x4,
+	TB_PCIE_LTSSM_RECOVERY_IDLE	= 0x5,
+	TB_PCIE_LTSSM_L0		= 0x6,
+	TB_PCIE_LTSSM_L1		= 0x7,
+	TB_PCIE_LTSSM_L2		= 0x8,
+	TB_PCIE_LTSSM_DISABLED		= 0x9,
+	TB_PCIE_LTSSM_HOT_RESET		= 0xa,
+};
+
 /* USB adapter registers */
 #define ADP_USB3_CS_0				0x00
 #define ADP_USB3_CS_0_V				BIT(30)
diff --git a/drivers/thunderbolt/tunnel.c b/drivers/thunderbolt/tunnel.c
index 28c1e5c062f3..72beaf99765f 100644
--- a/drivers/thunderbolt/tunnel.c
+++ b/drivers/thunderbolt/tunnel.c
@@ -296,6 +296,22 @@ static inline void tb_tunnel_changed(struct tb_tunnel *tunnel)
 			tunnel->src_port, tunnel->dst_port);
 }
 
+static int tb_pci_pre_activate(struct tb_tunnel *tunnel)
+{
+	struct tb_port *down = tunnel->src_port;
+	struct tb_port *up = tunnel->dst_port;
+	int ret;
+
+	if (!tb_switch_is_usb4(down->sw) || !tb_switch_is_usb4(up->sw))
+		return 0;
+
+	ret = usb4_pci_port_check_ltssm_state(down, TB_PCIE_LTSSM_DETECT);
+	if (ret)
+		return ret;
+
+	return usb4_pci_port_check_ltssm_state(up, TB_PCIE_LTSSM_DETECT);
+}
+
 static int tb_pci_set_ext_encapsulation(struct tb_tunnel *tunnel, bool enable)
 {
 	struct tb_port *port = tb_upstream_port(tunnel->dst_port->sw);
@@ -511,6 +527,7 @@ struct tb_tunnel *tb_tunnel_alloc_pci(struct tb *tb, struct tb_port *up,
 	if (!tunnel)
 		return NULL;
 
+	tunnel->pre_activate = tb_pci_pre_activate;
 	tunnel->activate = tb_pci_activate;
 	tunnel->src_port = down;
 	tunnel->dst_port = up;
diff --git a/drivers/thunderbolt/usb4.c b/drivers/thunderbolt/usb4.c
index 403a46aa35e5..706c9bc796e2 100644
--- a/drivers/thunderbolt/usb4.c
+++ b/drivers/thunderbolt/usb4.c
@@ -3145,3 +3145,26 @@ int usb4_pci_port_set_ext_encapsulation(struct tb_port *port, bool enable)
 	return tb_port_write(port, &val, TB_CFG_PORT,
 			     port->cap_adap + ADP_PCIE_CS_1, 1);
 }
+
+/**
+ * usb4_pci_port_check_ltssm_state() - Checks the LTSSM state of PCIe adapter
+ * @port: PCIe adapter
+ * @ltssm: PCIe adapter LTSSM state as encoded in &enum tb_pcie_ltssm_state
+ *
+ * Return:
+ * * %0 - If LTSSM state of @port is as expected @state.
+ * * %-ETIMEDOUT - The @ltssm state was not reached within the given timeout.
+ * * Negative errno - Other failure occurred.
+ */
+int usb4_pci_port_check_ltssm_state(struct tb_port *port,
+				    enum tb_pcie_ltssm_state ltssm)
+{
+	u32 val = FIELD_PREP(ADP_PCIE_CS_0_LTSSM_MASK, ltssm);
+
+	if (!tb_port_is_pcie_down(port) && !tb_port_is_pcie_up(port))
+		return -EINVAL;
+
+	return usb4_port_wait_for_bit(port, port->cap_adap + ADP_PCIE_CS_0,
+				      ADP_PCIE_CS_0_LTSSM_MASK, val, 500,
+				      USB4_PORT_DELAY);
+}
-- 
2.43.0

Re: [PATCH 2/5] thunderbolt: Verify PCIe adapters in detect state before setup PCIe tunnel

[Mika Westerberg]

On Tue, Jan 27, 2026 at 12:06:03AM +0200, Gil Fine wrote:
> USB4 Connection Manager guide suggests making sure PCIe downstream and PCIe
> upstream adapter is in Detect state, before set up a PCIe tunnel.
> 
> Add this step by checking LTSSM field in ADP_PCIE_CS_0 to follow the CM
> guide more closely.
> 
> Signed-off-by: Gil Fine <gil.fine@linux.intel.com>
> ---
>  drivers/thunderbolt/tb.h      |  2 ++
>  drivers/thunderbolt/tb_regs.h | 15 +++++++++++++++
>  drivers/thunderbolt/tunnel.c  | 17 +++++++++++++++++
>  drivers/thunderbolt/usb4.c    | 23 +++++++++++++++++++++++
>  4 files changed, 57 insertions(+)
> 
> diff --git a/drivers/thunderbolt/tb.h b/drivers/thunderbolt/tb.h
> index c2ff2069eb20..dbbbd2bd63f3 100644
> --- a/drivers/thunderbolt/tb.h
> +++ b/drivers/thunderbolt/tb.h
> @@ -1480,6 +1480,8 @@ int usb4_dp_port_allocate_bandwidth(struct tb_port *port, int bw);
>  int usb4_dp_port_requested_bandwidth(struct tb_port *port);
>  
>  int usb4_pci_port_set_ext_encapsulation(struct tb_port *port, bool enable);
> +int usb4_pci_port_check_ltssm_state(struct tb_port *port,
> +				    enum tb_pcie_ltssm_state ltssm);
>  
>  static inline bool tb_is_usb4_port_device(const struct device *dev)
>  {
> diff --git a/drivers/thunderbolt/tb_regs.h b/drivers/thunderbolt/tb_regs.h
> index c0bf136236e6..71bed02a6974 100644
> --- a/drivers/thunderbolt/tb_regs.h
> +++ b/drivers/thunderbolt/tb_regs.h
> @@ -473,10 +473,25 @@ struct tb_regs_port_header {
>  
>  /* PCIe adapter registers */
>  #define ADP_PCIE_CS_0				0x00
> +#define ADP_PCIE_CS_0_LTSSM_MASK		GENMASK(28, 25)
>  #define ADP_PCIE_CS_0_PE			BIT(31)
>  #define ADP_PCIE_CS_1				0x01
>  #define ADP_PCIE_CS_1_EE			BIT(0)
>  
> +enum tb_pcie_ltssm_state {
> +	TB_PCIE_LTSSM_DETECT		= 0x0,
> +	TB_PCIE_LTSSM_POLLING		= 0x1,
> +	TB_PCIE_LTSSM_CONFIG		= 0x2,
> +	TB_PCIE_LTSSM_CONFIG_IDLE	= 0x3,
> +	TB_PCIE_LTSSM_RECOVERY		= 0x4,
> +	TB_PCIE_LTSSM_RECOVERY_IDLE	= 0x5,
> +	TB_PCIE_LTSSM_L0		= 0x6,
> +	TB_PCIE_LTSSM_L1		= 0x7,
> +	TB_PCIE_LTSSM_L2		= 0x8,
> +	TB_PCIE_LTSSM_DISABLED		= 0x9,
> +	TB_PCIE_LTSSM_HOT_RESET		= 0xa,
> +};
> +
>  /* USB adapter registers */
>  #define ADP_USB3_CS_0				0x00
>  #define ADP_USB3_CS_0_V				BIT(30)
> diff --git a/drivers/thunderbolt/tunnel.c b/drivers/thunderbolt/tunnel.c
> index 28c1e5c062f3..72beaf99765f 100644
> --- a/drivers/thunderbolt/tunnel.c
> +++ b/drivers/thunderbolt/tunnel.c
> @@ -296,6 +296,22 @@ static inline void tb_tunnel_changed(struct tb_tunnel *tunnel)
>  			tunnel->src_port, tunnel->dst_port);
>  }
>  
> +static int tb_pci_pre_activate(struct tb_tunnel *tunnel)
> +{
> +	struct tb_port *down = tunnel->src_port;
> +	struct tb_port *up = tunnel->dst_port;
> +	int ret;
> +
> +	if (!tb_switch_is_usb4(down->sw) || !tb_switch_is_usb4(up->sw))

What if

 USB4 <-> TB3

I think we should do the same still, no?

> +		return 0;
> +
> +	ret = usb4_pci_port_check_ltssm_state(down, TB_PCIE_LTSSM_DETECT);
> +	if (ret)
> +		return ret;
> +
> +	return usb4_pci_port_check_ltssm_state(up, TB_PCIE_LTSSM_DETECT);
> +}
> +
>  static int tb_pci_set_ext_encapsulation(struct tb_tunnel *tunnel, bool enable)
>  {
>  	struct tb_port *port = tb_upstream_port(tunnel->dst_port->sw);
> @@ -511,6 +527,7 @@ struct tb_tunnel *tb_tunnel_alloc_pci(struct tb *tb, struct tb_port *up,
>  	if (!tunnel)
>  		return NULL;
>  
> +	tunnel->pre_activate = tb_pci_pre_activate;
>  	tunnel->activate = tb_pci_activate;
>  	tunnel->src_port = down;
>  	tunnel->dst_port = up;
> diff --git a/drivers/thunderbolt/usb4.c b/drivers/thunderbolt/usb4.c
> index 403a46aa35e5..706c9bc796e2 100644
> --- a/drivers/thunderbolt/usb4.c
> +++ b/drivers/thunderbolt/usb4.c
> @@ -3145,3 +3145,26 @@ int usb4_pci_port_set_ext_encapsulation(struct tb_port *port, bool enable)
>  	return tb_port_write(port, &val, TB_CFG_PORT,
>  			     port->cap_adap + ADP_PCIE_CS_1, 1);
>  }
> +
> +/**
> + * usb4_pci_port_check_ltssm_state() - Checks the LTSSM state of PCIe adapter
> + * @port: PCIe adapter
> + * @ltssm: PCIe adapter LTSSM state as encoded in &enum tb_pcie_ltssm_state
> + *
> + * Return:
> + * * %0 - If LTSSM state of @port is as expected @state.
> + * * %-ETIMEDOUT - The @ltssm state was not reached within the given timeout.
> + * * Negative errno - Other failure occurred.
> + */
> +int usb4_pci_port_check_ltssm_state(struct tb_port *port,
> +				    enum tb_pcie_ltssm_state ltssm)
> +{
> +	u32 val = FIELD_PREP(ADP_PCIE_CS_0_LTSSM_MASK, ltssm);
> +
> +	if (!tb_port_is_pcie_down(port) && !tb_port_is_pcie_up(port))
> +		return -EINVAL;
> +
> +	return usb4_port_wait_for_bit(port, port->cap_adap + ADP_PCIE_CS_0,
> +				      ADP_PCIE_CS_0_LTSSM_MASK, val, 500,
> +				      USB4_PORT_DELAY);
> +}
> -- 
> 2.43.0

[PATCH 3/5] thunderbolt: Verify Router Ready bit is set after router enumeration

[Gil Fine]

The USB4 Connection Manager guide specifies that after enumerating a
router, the Connection Manager shall verify that the Router Ready bit
(ROUTER_CS_6.RR) has been set to ensure hardware configuration has completed.
Currently, this step is missing from the enumeration sequence.

Add this check to follow the Connection Manager guide more closely.

Signed-off-by: Gil Fine <gil.fine@linux.intel.com>
---
 drivers/thunderbolt/switch.c  | 5 +++++
 drivers/thunderbolt/tb_regs.h | 1 +
 2 files changed, 6 insertions(+)

diff --git a/drivers/thunderbolt/switch.c b/drivers/thunderbolt/switch.c
index e7faa203b782..11e8c1dd3090 100644
--- a/drivers/thunderbolt/switch.c
+++ b/drivers/thunderbolt/switch.c
@@ -2641,6 +2641,11 @@ int tb_switch_configure(struct tb_switch *sw)
 			return ret;
 
 		ret = usb4_switch_setup(sw);
+		if (ret)
+			return ret;
+
+		ret = tb_switch_wait_for_bit(sw, ROUTER_CS_6, ROUTER_CS_6_RR,
+					     ROUTER_CS_6_RR, 500);
 	} else {
 		if (sw->config.vendor_id != PCI_VENDOR_ID_INTEL)
 			tb_sw_warn(sw, "unknown switch vendor id %#x\n",
diff --git a/drivers/thunderbolt/tb_regs.h b/drivers/thunderbolt/tb_regs.h
index 71bed02a6974..7e65bc9bcb12 100644
--- a/drivers/thunderbolt/tb_regs.h
+++ b/drivers/thunderbolt/tb_regs.h
@@ -216,6 +216,7 @@ struct tb_regs_switch_header {
 #define ROUTER_CS_6_WOPS			BIT(2)
 #define ROUTER_CS_6_WOUS			BIT(3)
 #define ROUTER_CS_6_HCI				BIT(18)
+#define ROUTER_CS_6_RR				BIT(24)
 #define ROUTER_CS_6_CR				BIT(25)
 #define ROUTER_CS_7				0x07
 #define ROUTER_CS_9				0x09
-- 
2.43.0

Re: [PATCH 3/5] thunderbolt: Verify Router Ready bit is set after router enumeration

[Mika Westerberg]

On Tue, Jan 27, 2026 at 12:06:04AM +0200, Gil Fine wrote:
> The USB4 Connection Manager guide specifies that after enumerating a
> router, the Connection Manager shall verify that the Router Ready bit
> (ROUTER_CS_6.RR) has been set to ensure hardware configuration has completed.
> Currently, this step is missing from the enumeration sequence.
> 
> Add this check to follow the Connection Manager guide more closely.
> 
> Signed-off-by: Gil Fine <gil.fine@linux.intel.com>
> ---
>  drivers/thunderbolt/switch.c  | 5 +++++
>  drivers/thunderbolt/tb_regs.h | 1 +
>  2 files changed, 6 insertions(+)
> 
> diff --git a/drivers/thunderbolt/switch.c b/drivers/thunderbolt/switch.c
> index e7faa203b782..11e8c1dd3090 100644
> --- a/drivers/thunderbolt/switch.c
> +++ b/drivers/thunderbolt/switch.c
> @@ -2641,6 +2641,11 @@ int tb_switch_configure(struct tb_switch *sw)
>  			return ret;
>  
>  		ret = usb4_switch_setup(sw);
> +		if (ret)
> +			return ret;
> +
> +		ret = tb_switch_wait_for_bit(sw, ROUTER_CS_6, ROUTER_CS_6_RR,
> +					     ROUTER_CS_6_RR, 500);

Can you move this inside usb4_switch_setup()?


>  	} else {
>  		if (sw->config.vendor_id != PCI_VENDOR_ID_INTEL)
>  			tb_sw_warn(sw, "unknown switch vendor id %#x\n",
> diff --git a/drivers/thunderbolt/tb_regs.h b/drivers/thunderbolt/tb_regs.h
> index 71bed02a6974..7e65bc9bcb12 100644
> --- a/drivers/thunderbolt/tb_regs.h
> +++ b/drivers/thunderbolt/tb_regs.h
> @@ -216,6 +216,7 @@ struct tb_regs_switch_header {
>  #define ROUTER_CS_6_WOPS			BIT(2)
>  #define ROUTER_CS_6_WOUS			BIT(3)
>  #define ROUTER_CS_6_HCI				BIT(18)
> +#define ROUTER_CS_6_RR				BIT(24)
>  #define ROUTER_CS_6_CR				BIT(25)
>  #define ROUTER_CS_7				0x07
>  #define ROUTER_CS_9				0x09
> -- 
> 2.43.0

[PATCH 4/5] thunderbolt: Increase timeout to wait for Configuration Ready bit

[Gil Fine]

After setting the Configuration Valid bit (ROUTER_CS_5.CV), the USB4
Connection Manager guide recommends waiting for the router to set the
Configuration Ready bit (ROUTER_CS_6.CR), with a timeout of 500 ms.

Increase the timeout to comply with the specification.

While there, fix the kernel-doc typo.

Signed-off-by: Gil Fine <gil.fine@linux.intel.com>
---
 drivers/thunderbolt/usb4.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/thunderbolt/usb4.c b/drivers/thunderbolt/usb4.c
index 706c9bc796e2..c1d1c98d4ab1 100644
--- a/drivers/thunderbolt/usb4.c
+++ b/drivers/thunderbolt/usb4.c
@@ -304,7 +304,7 @@ int usb4_switch_setup(struct tb_switch *sw)
  * Sets configuration valid bit for the router. Must be called before
  * any tunnels can be set through the router and after
  * usb4_switch_setup() has been called. Can be called to host and device
- * routers (does nothing for the latter).
+ * routers (does nothing for the former).
  *
  * Return: %0 on success, negative errno otherwise.
  */
@@ -327,7 +327,7 @@ int usb4_switch_configuration_valid(struct tb_switch *sw)
 		return ret;
 
 	return tb_switch_wait_for_bit(sw, ROUTER_CS_6, ROUTER_CS_6_CR,
-				      ROUTER_CS_6_CR, 50);
+				      ROUTER_CS_6_CR, 500);
 }
 
 /**
-- 
2.43.0

[PATCH 5/5] thunderbolt: Increase Notification Timeout to 255 ms for USB4 routers

[Gil Fine]

Currently we set the Notification Timeout field in ROUTER_CS_4 for USB4
routers to 10 ms, which is unnecessarily short and may cause unnecessary
retransmissions of Hot Plug packets by the router in case of slow
software response.

Change Notification Timeout for USB4 routers to use 255 ms, aligning
their behavior with Thunderbolt 3 and providing adequate time for
software to process Hot Plug Events.

While there, also fix the comment describing the Notification Timeout
field to match the USB4 specification.

Signed-off-by: Gil Fine <gil.fine@linux.intel.com>
---
 drivers/thunderbolt/switch.c  | 13 +++----------
 drivers/thunderbolt/tb_regs.h |  3 +--
 2 files changed, 4 insertions(+), 12 deletions(-)

diff --git a/drivers/thunderbolt/switch.c b/drivers/thunderbolt/switch.c
index 11e8c1dd3090..7962a7e9d4b3 100644
--- a/drivers/thunderbolt/switch.c
+++ b/drivers/thunderbolt/switch.c
@@ -1742,8 +1742,6 @@ int tb_switch_wait_for_bit(struct tb_switch *sw, u32 offset, u32 bit,
 /*
  * tb_plug_events_active() - enable/disable plug events on a switch
  *
- * Also configures a sane plug_events_delay of 255ms.
- *
  * Return: %0 on success, negative errno otherwise.
  */
 static int tb_plug_events_active(struct tb_switch *sw, bool active)
@@ -1754,11 +1752,6 @@ static int tb_plug_events_active(struct tb_switch *sw, bool active)
 	if (tb_switch_is_icm(sw) || tb_switch_is_usb4(sw))
 		return 0;
 
-	sw->config.plug_events_delay = 0xff;
-	res = tb_sw_write(sw, ((u32 *) &sw->config) + 4, TB_CFG_SWITCH, 4, 1);
-	if (res)
-		return res;
-
 	res = tb_sw_read(sw, &data, TB_CFG_SWITCH, sw->cap_plug_events + 1, 1);
 	if (res)
 		return res;
@@ -2620,7 +2613,8 @@ int tb_switch_configure(struct tb_switch *sw)
 	       tb_route_length(route), sw->config.upstream_port_number);
 
 	sw->config.enabled = 1;
-
+	/* Set Notification Timeout to 255 ms for all routers */
+	sw->config.plug_events_delay = 0xff;
 	if (tb_switch_is_usb4(sw)) {
 		/*
 		 * For USB4 devices, we need to program the CM version
@@ -2632,7 +2626,6 @@ int tb_switch_configure(struct tb_switch *sw)
 			sw->config.cmuv = ROUTER_CS_4_CMUV_V1;
 		else
 			sw->config.cmuv = ROUTER_CS_4_CMUV_V2;
-		sw->config.plug_events_delay = 0xa;
 
 		/* Enumerate the switch */
 		ret = tb_sw_write(sw, (u32 *)&sw->config + 1, TB_CFG_SWITCH,
@@ -2658,7 +2651,7 @@ int tb_switch_configure(struct tb_switch *sw)
 
 		/* Enumerate the switch */
 		ret = tb_sw_write(sw, (u32 *)&sw->config + 1, TB_CFG_SWITCH,
-				  ROUTER_CS_1, 3);
+				  ROUTER_CS_1, 4);
 	}
 	if (ret)
 		return ret;
diff --git a/drivers/thunderbolt/tb_regs.h b/drivers/thunderbolt/tb_regs.h
index 7e65bc9bcb12..f8a84e07969f 100644
--- a/drivers/thunderbolt/tb_regs.h
+++ b/drivers/thunderbolt/tb_regs.h
@@ -182,8 +182,7 @@ struct tb_regs_switch_header {
 	/* DWORD 4 */
 	u32 plug_events_delay:8; /*
 				  * RW, pause between plug events in
-				  * milliseconds. Writing 0x00 is interpreted
-				  * as 255ms.
+				  * milliseconds.
 				  */
 	u32 cmuv:8;
 	u32 __unknown4:8;
-- 
2.43.0