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(unknown []) by gzga-smtp-mtada-g0-3 (Coremail) with SMTP id _____wDnUmm+hfNptZrZCg--.19910S5; Fri, 01 May 2026 00:39:29 +0800 (CST) From: Hans Zhang <18255117159@163.com> To: Thinh.Nguyen@synopsys.com, gregkh@linuxfoundation.org, peter.griffin@linaro.org, andre.draszik@linaro.org, tudor.ambarus@linaro.org, mathias.nyman@intel.com, chunfeng.yun@mediatek.com, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, badhri@google.com, heikki.krogerus@linux.intel.com Cc: linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-mediatek@lists.infradead.org, Hans Zhang <18255117159@163.com> Subject: [PATCH 3/6] usb: dwc3: dwc3-octeon: Use FIELD_MODIFY() Date: Fri, 1 May 2026 00:39:16 +0800 Message-Id: <20260430163919.47372-4-18255117159@163.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260430163919.47372-1-18255117159@163.com> References: <20260430163919.47372-1-18255117159@163.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CM-TRANSID:_____wDnUmm+hfNptZrZCg--.19910S5 X-Coremail-Antispam: 1Uf129KBjvJXoW7urW7uF4fKFyxAryfZFyrWFg_yoW8Aw4rpw n8C3WSyFnFkrn5uw45Gay8Aryrtay2krW8KryDJ3yxZw4DXrn7Wayqkw4rtrn8Wa4xtF10 k3yvyrW3uFW5AF7anT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDUYxBIdaVFxhVjvjDU0xZFpf9x0zi-B_bUUUUU= X-CM-SenderInfo: rpryjkyvrrlimvzbiqqrwthudrp/xtbC7AHojGnzhcHZvgAA3w Use FIELD_MODIFY() to remove open-coded bit manipulation. No functional change intended. Signed-off-by: Hans Zhang <18255117159@163.com> --- drivers/usb/dwc3/dwc3-octeon.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/drivers/usb/dwc3/dwc3-octeon.c b/drivers/usb/dwc3/dwc3-octeon.c index 42bfc14ae0c4..2201f0f34abb 100644 --- a/drivers/usb/dwc3/dwc3-octeon.c +++ b/drivers/usb/dwc3/dwc3-octeon.c @@ -296,8 +296,7 @@ static int dwc3_octeon_setup(struct dwc3_octeon *octeon, return div; } val = dwc3_octeon_readq(uctl_ctl_reg); - val &= ~USBDRD_UCTL_CTL_H_CLKDIV_SEL; - val |= FIELD_PREP(USBDRD_UCTL_CTL_H_CLKDIV_SEL, div); + FIELD_MODIFY(USBDRD_UCTL_CTL_H_CLKDIV_SEL, &val, div); val |= USBDRD_UCTL_CTL_H_CLK_EN; dwc3_octeon_writeq(uctl_ctl_reg, val); val = dwc3_octeon_readq(uctl_ctl_reg); @@ -314,14 +313,11 @@ static int dwc3_octeon_setup(struct dwc3_octeon *octeon, /* Step 5a: Reference clock configuration. */ val = dwc3_octeon_readq(uctl_ctl_reg); val &= ~USBDRD_UCTL_CTL_REF_CLK_DIV2; - val &= ~USBDRD_UCTL_CTL_REF_CLK_SEL; - val |= FIELD_PREP(USBDRD_UCTL_CTL_REF_CLK_SEL, ref_clk_sel); + FIELD_MODIFY(USBDRD_UCTL_CTL_REF_CLK_SEL, &val, ref_clk_sel); - val &= ~USBDRD_UCTL_CTL_REF_CLK_FSEL; - val |= FIELD_PREP(USBDRD_UCTL_CTL_REF_CLK_FSEL, ref_clk_fsel); + FIELD_MODIFY(USBDRD_UCTL_CTL_REF_CLK_FSEL, &val, ref_clk_fsel); - val &= ~USBDRD_UCTL_CTL_MPLL_MULTIPLIER; - val |= FIELD_PREP(USBDRD_UCTL_CTL_MPLL_MULTIPLIER, mpll_mul); + FIELD_MODIFY(USBDRD_UCTL_CTL_MPLL_MULTIPLIER, &val, mpll_mul); /* Step 5b: Configure and enable spread-spectrum for SuperSpeed. */ val |= USBDRD_UCTL_CTL_SSC_EN; -- 2.34.1