From: Konrad Dybcio <konradybcio@kernel.org>
To: Thinh Nguyen <Thinh.Nguyen@synopsys.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Mathias Nyman <mathias.nyman@intel.com>
Cc: linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org,
usb4-upstream@oss.qualcomm.com,
Raghavendra Thoorpu <rthoorpu@qti.qualcomm.com>,
Mika Westerberg <mika.westerberg@linux.intel.com>,
Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Subject: [PATCH 2/2] usb: dwc3: Notify XHCI core of tunneled status
Date: Tue, 05 May 2026 10:55:05 +0200 [thread overview]
Message-ID: <20260505-topic-dwc3_tunneling_state-v1-2-4aaa6c3c14cb@oss.qualcomm.com> (raw)
In-Reply-To: <20260505-topic-dwc3_tunneling_state-v1-0-4aaa6c3c14cb@oss.qualcomm.com>
From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
The Thunderbolt framework relies on the USB core to create device links
for tunneled ports, so that the USB3 controller is only kept
runtime-resumed for the duration of the tunneling. This depends on
first knowing whether a connection is tunneled or native.
Add the logic to handle that for DWC3 controllers.
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
---
drivers/usb/dwc3/core.c | 12 ++++++++++++
drivers/usb/dwc3/core.h | 18 ++++++++++++++++++
drivers/usb/dwc3/host.c | 12 ++++++++++++
3 files changed, 42 insertions(+)
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 65213896de99..7cec4911e278 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -162,6 +162,18 @@ void dwc3_set_prtcap(struct dwc3 *dwc, u32 mode, bool ignore_susphy)
}
EXPORT_SYMBOL_GPL(dwc3_set_prtcap);
+enum usb_link_tunnel_mode dwc3_link_tunnel_mode(struct dwc3 *dwc, u8 port)
+{
+ /* Prior versions had no CIO support */
+ if (!DWC3_VER_IS_WITHIN(DWC31, 191A, ANY))
+ return USB_LINK_NATIVE;
+
+ if (dwc3_readl(dwc, DWC3_CIOCTRL(port)) & DWC3_CIOCTRL_CIO_EN)
+ return USB_LINK_TUNNELED;
+
+ return USB_LINK_NATIVE;
+}
+
static void __dwc3_set_mode(struct work_struct *work)
{
struct dwc3 *dwc = work_to_dwc(work);
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index e0dee9d28740..9594829de6c7 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -179,6 +179,11 @@
#define DWC3_OEVTEN 0xcc0C
#define DWC3_OSTS 0xcc10
+/* CIO regs */
+#define DWC3_CIO_BASE(n) (0xcd20 + ((n) * 0x30))
+#define DWC3_CIOCTRL(n) (DWC3_CIO_BASE(n) + 0x00)
+#define DWC3_CIOCTRL_CIO_EN BIT(0)
+
#define DWC3_LLUCTL(n) (0xd024 + ((n) * 0x80))
/* Bit fields */
@@ -1309,6 +1314,7 @@ struct dwc3 {
#define DWC31_REVISION_170A 0x3137302a
#define DWC31_REVISION_180A 0x3138302a
#define DWC31_REVISION_190A 0x3139302a
+#define DWC31_REVISION_191A 0x3139312a
#define DWC31_REVISION_200A 0x3230302a
#define DWC32_REVISION_ANY 0x0
@@ -1653,11 +1659,23 @@ static inline void dwc3_pre_run_stop(struct dwc3 *dwc, bool is_on)
#if IS_ENABLED(CONFIG_USB_DWC3_HOST) || IS_ENABLED(CONFIG_USB_DWC3_DUAL_ROLE)
int dwc3_host_init(struct dwc3 *dwc);
void dwc3_host_exit(struct dwc3 *dwc);
+
+/**
+ * dwc3_link_tunnel_mode - Check whether the link is tunneled over TBT/USB4
+ * @dwc: Pointer to DWC3 controller context
+ * @port: 0-based port index
+ *
+ * Returns: USB_LINK_TUNNELED if tunneled, USB_LINK_NATIVE if not, or
+ * when the controller does not have USB4 capabilities.
+ */
+enum usb_link_tunnel_mode dwc3_link_tunnel_mode(struct dwc3 *dwc, u8 port);
#else
static inline int dwc3_host_init(struct dwc3 *dwc)
{ return 0; }
static inline void dwc3_host_exit(struct dwc3 *dwc)
{ }
+static inline enum usb_link_tunnel_mode dwc3_link_tunnel_mode(struct dwc3 *dwc, u8 port)
+{ return USB_LINK_UNKNOWN; }
#endif
#if IS_ENABLED(CONFIG_USB_DWC3_GADGET) || IS_ENABLED(CONFIG_USB_DWC3_DUAL_ROLE)
diff --git a/drivers/usb/dwc3/host.c b/drivers/usb/dwc3/host.c
index 96b588bd08cd..eb03b079696e 100644
--- a/drivers/usb/dwc3/host.c
+++ b/drivers/usb/dwc3/host.c
@@ -77,8 +77,20 @@ static void dwc3_xhci_plat_start(struct usb_hcd *hcd)
dwc3_enable_susphy(dwc, true);
}
+static enum usb_link_tunnel_mode dwc3_xhci_tunnel_mode(struct usb_hcd *hcd, int portnum)
+{
+ struct platform_device *pdev;
+ struct dwc3 *dwc;
+
+ pdev = to_platform_device(hcd->self.controller);
+ dwc = dev_get_drvdata(pdev->dev.parent);
+
+ return dwc3_link_tunnel_mode(dwc, portnum);
+}
+
static const struct xhci_plat_priv dwc3_xhci_plat_quirk = {
.plat_start = dwc3_xhci_plat_start,
+ .tunnel_mode = dwc3_xhci_tunnel_mode,
};
static void dwc3_host_fill_xhci_irq_res(struct dwc3 *dwc,
--
2.54.0
next prev parent reply other threads:[~2026-05-05 8:55 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-05 8:55 [PATCH 0/2] DWC3 link tunneling state reporting Konrad Dybcio
2026-05-05 8:55 ` [PATCH 1/2] usb: host: xhci: Allow non-Intel usb_link_tunnel_mode reporting Konrad Dybcio
2026-05-05 12:14 ` Mika Westerberg
2026-05-07 10:40 ` Konrad Dybcio
2026-05-07 12:48 ` Mathias Nyman
2026-05-07 12:53 ` Konrad Dybcio
2026-05-07 13:11 ` Mika Westerberg
2026-05-05 8:55 ` Konrad Dybcio [this message]
2026-05-06 23:40 ` [PATCH 2/2] usb: dwc3: Notify XHCI core of tunneled status Thinh Nguyen
2026-05-07 10:34 ` Konrad Dybcio
2026-05-07 17:46 ` Jack Pham
2026-05-07 22:46 ` Thinh Nguyen
2026-05-08 12:04 ` Konrad Dybcio
2026-05-08 23:31 ` Thinh Nguyen
2026-05-11 9:06 ` Konrad Dybcio
2026-05-11 18:44 ` Sven Peter
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