From: Michal Pecio <michal.pecio@gmail.com>
To: David Laight <david.laight.linux@gmail.com>
Cc: Xincheng Zhang <zhangxincheng@ultrarisc.com>,
cyrozap@gmail.com, gregkh@linuxfoundation.org,
linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org,
mathias.nyman@intel.com
Subject: Re: [PATCH] usb: xhci-pci: Disable 64-bit DMA for VIA VL805
Date: Fri, 26 Jun 2026 10:57:23 +0200 [thread overview]
Message-ID: <20260626105723.42972329.michal.pecio@gmail.com> (raw)
In-Reply-To: <20260626090615.616666b4@pumpkin>
On Fri, 26 Jun 2026 09:06:15 +0100, David Laight wrote:
> Can you do a read-back of one of the control registers that contains
> an address - if you are lucky the high bits will return zero.
> That might let the generic code enforce a limit.
Interesting idea, but nope. My VL805 with 36 bit 013600 firmware
is set up with 37 bit DMA mask right now. MMIO registers read:
DCBAAP_LOW = 0xffffe000
DCBAAP_HIGH = 0x0000001f
IR0_ERSTBA_LOW = 0xfffee000
IR0_ERSTBA_HIGH = 0x0000001f
IR0_ERDP_LOW = 0xffff4018
IR0_ERDP_HIGH = 0x0000001f
Nothing hints that the chip will truncate this to 36 bits when
DMA-ing. We learn about it when it happens.
Regards,
Michal
next prev parent reply other threads:[~2026-06-26 8:57 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-23 7:32 [PATCH] usb: xhci-pci: Disable 64-bit DMA for VIA VL805 Xincheng Zhang
2026-06-23 10:18 ` Michal Pecio
2026-06-24 5:26 ` Xincheng Zhang
2026-06-24 7:06 ` Xincheng Zhang
2026-06-25 0:04 ` Michal Pecio
2026-06-25 2:16 ` Xincheng Zhang
2026-06-25 17:18 ` Michal Pecio
2026-06-26 2:08 ` Xincheng Zhang
2026-06-26 8:06 ` David Laight
2026-06-26 8:57 ` Michal Pecio [this message]
2026-06-26 10:55 ` David Laight
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