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From: Mika Westerberg <mika.westerberg@linux.intel.com>
To: James R Taylor <jrtaylor11@gmail.com>
Cc: linux-usb@vger.kernel.org
Subject: Re: thunderbolt: AMD Phoenix USB4 host advertises Gen3 Support=0 in SB LINK_CONF with TB5 device, link stuck at Gen2
Date: Mon, 9 Nov 2026 16:39:55 +0100	[thread overview]
Message-ID: <20261109153955.GU176724@black.igk.intel.com> (raw)
In-Reply-To: <1794235167.3657.reply.hermes@gmail.com>

Hi,

On Mon, Nov 09, 2026 at 02:39:27PM +0000, James R Taylor wrote:
> Hi Mika,
> 
> On Mon, Nov 09, 2026 at 03:20:41PM +0100, Mika Westerberg wrote:
> > Please drop thunderbolt.host_reset=0 and pcie_aspm=off. The later disables
> > much more than just ASPM so it may affect everything. Once you have done
> > that please take another dmesg (and check also the link registers via
> > tbdump).
> 
> Done. I rebooted with both parameters removed. The only addition is
> thunderbolt.dyndbg=+p so the full debug output is in the log:
> 
>   nohibernate root=fstab loglevel=4 lsm=landlock,yama,bpf usb-storage.quirks=0bc2:3343:u thunderbolt.dyndbg=+p
> 
> The result is the same as before: the link still comes up as TBT at
> 10 Gb/s x2 (the dmesg has "2: link: TBT" and "current link speed
> 10.0 Gb/s"), and the lane adapter registers are identical to my
> previous dump. The host lane adapter targets Gen 3, the DEG2 targets
> Gen 4, and both report Current Link Speed = Gen 2, x2.
> 
> The full dmesg from this boot is attached (gzipped). The tbdump output
> is below.
> 
>     # cmdline: initrd=\EFI\nixos\c18phgd1m2qpc2g72pz14fg9h9i38j6w-initrd-linux-7.2.15-initrd.efi init=/nix/store/x1jyvpbgdhl6a91iysmbr5wisgi0sghd-nixos-system-nyx-26.11.20261106.4fe25e1/init usb-storage.quirks=0bc2:3343:u nohibernate root=fstab loglevel=4 lsm=landlock,yama,bpf thunderbolt.dyndbg=+p

Yeah now this is better :)

>     # 1-2 rx=10.0 Gb/s x2 tx=10.0 Gb/s x2
>     # usb4_port link: none tbt tbt none none none
> 
>     $ tbdump -d 1 -r 0 -a 2 -N 2 -vv LANE_ADP_CS_0
>     0x0080 0x003c01c0 0b00000000 00111100 00000001 11000000 .<.. LANE_ADP_CS_0
>       [00:07]       0xc0 Next Capability Pointer
>       [08:15]        0x1 Capability ID
>       [16:19]        0xc Supported Link Speeds
>       [20:21]        0x3 Supported Link Widths (SLW)
>       [22:23]        0x0 Gen 4 Asymmetric Support (G4AS)
>       [26:26]        0x0 CL0s Support
>       [27:27]        0x0 CL1 Support
>       [28:28]        0x0 CL2 Support
>     0x0081 0x4828003c 0b01001000 00101000 00000000 00111100 H(.< LANE_ADP_CS_1
>       [00:03]        0xc Target Link Speed → Router shall attempt Gen 3 speed
>       [04:05]        0x3 Target Link Width → Establish a Symmetric Link
>       [06:07]        0x0 Target Asymmetric Link → Establish Symmetric Link
>       [10:10]        0x0 CL0s Enable
>       [11:11]        0x0 CL1 Enable
>       [12:12]        0x0 CL2 Enable
>       [14:14]        0x0 Lane Disable (LD)
>       [15:15]        0x0 Lane Bonding (LB)
>       [16:19]        0x8 Current Link Speed → Gen 2
>       [20:25]        0x2 Negotiated Link Width → Symmetric Link (x2)
>       [26:29]        0x2 Adapter State → CL0
>       [30:30]        0x1 PM Secondary (PMS)
> 
>     $ tbdump -d 1 -r 2 -a 1 -N 2 -vv LANE_ADP_CS_0
>     0x0036 0x0cfe01c0 0b00001100 11111110 00000001 11000000 .... LANE_ADP_CS_0
>       [00:07]       0xc0 Next Capability Pointer
>       [08:15]        0x1 Capability ID
>       [16:19]        0xe Supported Link Speeds
>       [20:21]        0x3 Supported Link Widths (SLW)
>       [22:23]        0x3 Gen 4 Asymmetric Support (G4AS)
>       [26:26]        0x1 CL0s Support
>       [27:27]        0x1 CL1 Support
>       [28:28]        0x0 CL2 Support
>     0x0037 0x4828003e 0b01001000 00101000 00000000 00111110 H(.> LANE_ADP_CS_1
>       [00:03]        0xe Target Link Speed → Router shall attempt Gen 4 speed
>       [04:05]        0x3 Target Link Width → Establish a Symmetric Link
>       [06:07]        0x0 Target Asymmetric Link → Establish Symmetric Link
>       [10:10]        0x0 CL0s Enable
>       [11:11]        0x0 CL1 Enable
>       [12:12]        0x0 CL2 Enable
>       [14:14]        0x0 Lane Disable (LD)
>       [15:15]        0x0 Lane Bonding (LB)
>       [16:19]        0x8 Current Link Speed → Gen 2
>       [20:25]        0x2 Negotiated Link Width → Symmetric Link (x2)
>       [26:29]        0x2 Adapter State → CL0
>       [30:30]        0x1 PM Secondary (PMS)
> 
>     $ tbdump -d 1 -r 2 -a 2 -N 2 -vv LANE_ADP_CS_0
>     0x0036 0x0cfe0100 0b00001100 11111110 00000001 00000000 .... LANE_ADP_CS_0
>       [00:07]        0x0 Next Capability Pointer
>       [08:15]        0x1 Capability ID
>       [16:19]        0xe Supported Link Speeds
>       [20:21]        0x3 Supported Link Widths (SLW)
>       [22:23]        0x3 Gen 4 Asymmetric Support (G4AS)
>       [26:26]        0x1 CL0s Support
>       [27:27]        0x1 CL1 Support
>       [28:28]        0x0 CL2 Support
>     0x0037 0x4828003e 0b01001000 00101000 00000000 00111110 H(.> LANE_ADP_CS_1
>       [00:03]        0xe Target Link Speed → Router shall attempt Gen 4 speed
>       [04:05]        0x3 Target Link Width → Establish a Symmetric Link
>       [06:07]        0x0 Target Asymmetric Link → Establish Symmetric Link
>       [10:10]        0x0 CL0s Enable
>       [11:11]        0x0 CL1 Enable
>       [12:12]        0x0 CL2 Enable
>       [14:14]        0x0 Lane Disable (LD)
>       [15:15]        0x0 Lane Bonding (LB)
>       [16:19]        0x8 Current Link Speed → Gen 2
>       [20:25]        0x2 Negotiated Link Width → Symmetric Link (x2)
>       [26:29]        0x2 Adapter State → CL0
>       [30:30]        0x1 PM Secondary (PMS)

We could still look at the PORT_CS_18 but the driver log already tells that
it is in TBT3 mode. What kind of cable you are using? Is it short TB4/5
cable or something else?

  reply	other threads:[~2026-11-09 15:39 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-08 13:15 thunderbolt: AMD Phoenix USB4 host advertises Gen3 Support=0 in SB LINK_CONF with TB5 device, link stuck at Gen2 James Taylor
2026-11-09 11:18 ` Mika Westerberg
2026-11-09 11:25   ` James Taylor
2026-11-09 14:20     ` Mika Westerberg
2026-11-09 14:39       ` James R Taylor
2026-11-09 15:39         ` Mika Westerberg [this message]
2026-11-09 15:41           ` James R Taylor
2026-11-09 15:50             ` Mika Westerberg
2026-11-09 15:53               ` James R Taylor

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