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[91.155.214.58]) by smtp.gmail.com with ESMTPSA id k9sm1231222lja.52.2020.05.14.03.23.13 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 14 May 2020 03:23:14 -0700 (PDT) From: Felipe Balbi To: Neil Armstrong , kishon@ti.com, khilman@baylibre.com, martin.blumenstingl@googlemail.com Cc: Neil Armstrong , linux-amlogic@lists.infradead.org, linux-usb@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 00/13] usb: dwc3: meson: add OTG support for GXL/GXM In-Reply-To: <87369rfo7l.fsf@kernel.org> References: <20200324102030.31000-1-narmstrong@baylibre.com> <87369rfo7l.fsf@kernel.org> Date: Thu, 14 May 2020 13:23:09 +0300 Message-ID: <87r1vm4xyq.fsf@kernel.org> MIME-Version: 1.0 Content-Type: multipart/signed; boundary="=-=-="; micalg=pgp-sha256; protocol="application/pgp-signature" Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org --=-=-= Content-Type: text/plain Content-Transfer-Encoding: quoted-printable Felipe Balbi writes: > Neil Armstrong writes: > >> The USB support was initialy done with a set of PHYs and dwc3-of-simple >> because the architecture of the USB complex was not understood correctly >> at the time (and proper documentation was missing...). >> >> But with the G12A family, the USB complex was correctly understood and >> implemented correctly. >> But seems the G12A architecture was derived for the GXL USB architecture, >> with minor differences and looks we can share most of the USB DWC3 glue >> driver. >> >> This patchset refactors and adds callbacks to handle the architecture >> difference while keeping the main code shared. >> >> The main difference is that on GXL/GXM the USB2 PHY control registers >> are mixed with the PHY registers (we already handle correctly), and >> the GLUE registers are allmost (99%) the same as G12A. >> >> But, the GXL/GXM HW is buggy, here are the quirks : >> - for the DWC2 controller to reset correctly, the GLUE mux must be switc= hed >> to peripheral when the DWC2 controlle probes. For now it's handled by = simply >> switching to device when probing the subnodes, but it may be not enough >> - when manually switching from Host to Device when the USB port is not >> populated (should not happen with proper Micro-USB/USB-C OTG switch), = it >> makes the DWC3 to crash. The only way to avoid that is to use the Host >> Disconnect bit to disconnect the DWC3 controller from the port, but we= can't >> recover the Host functionnality unless resetting the DWC3 controller. >> This bit is set when only manual switch is done, and a warning is prin= ted >> on manual switching. >> >> The patches 1-8 should be applied first, then either waiting the next re= lease >> or if the usb maintainer can provide us a stable tag, we can use it to m= erge >> the DT and bindings. > > it's unclear to me if this series is ready to be merged. Can someone > confirm? If it is, can you resend with all reviewed by tags in place? Are we getting a v2 for this? =2D-=20 balbi --=-=-= Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIzBAEBCAAdFiEElLzh7wn96CXwjh2IzL64meEamQYFAl69HA4ACgkQzL64meEa mQY4DhAAtHTcNLDu5ri1XuAeABlYEcezvODzuPM7Xg0my7l1TAURKXzAe0LV/LSB 9FU5hFcfAPUD7JSDmyGey9foVoFKo0ZxOvXLTXCW7AFHq5UyphcWAa5dW7kjtrI7 uqJ9VYc6gdQ6a/lEJXTdEuq8lLBt88hJkU8OPjzedp82in9fGXZg0mmwDePj3yVE 6KAnwJG+9qKZ/t06kNY2POoQpyFGnjOruj+9K4kG1R/RXGrU1YV1Cq6+GZp/DNoj Z81nw30hMBIFmKrxMl9bx+/hXAQUPV0C01txbCkdCGVTtp/L7GB3RXWgEljIyPPw KiE2yF12BFeuOB2egjAIWVztPxlzh0W19f/2bAQPEhlHrfcu83SJDAdEfMx/pe+w aFVJhdTZz+GeJ7K1Oame/ddtzbuPTyUbZFo4c0qASictw1dXGir88hOBeRrzpjJ0 d7cmNieizTfV8EoF0/FKN1NuwIie/k/dZiejZ28lukE8pZ2RUXxuBrrncmHk+Hrp iHTOjXsXTYJgVU4OxXFk9Q+B0YYgvpiAtrAS3Hpn3UQMX+KYd1RMELFSYtBLUGCG TZ9WJPGijn2G7rmvDy0sJtxhLsRoE9tx7tvr6HG5btz2fMdZmTnK6cW1nyIoP8kP ijmeyb1OUfQTkFoBIZUIPi5pTkuuqScPtsu7LAF+nP7HjD/+VYk= =8p6e -----END PGP SIGNATURE----- --=-=-=--