Re: USB2 / USB3 compatibility problems: xhci_hcd 0000:00:06.0: WARN Wrong bounce buffer write length: 0 != 512

[Mathias Nyman <mathias.nyman@linux.intel.com>]

On 26.1.2021 9.26, Andreas Hartmann wrote:
> 
> On 25.01.21 at 21:06 Andreas Hartmann wrote:
>> Hello Mathias,
>>
>> On 25.01.21 at 19:28 Mathias Nyman wrote:
>>> Hi
>>>
>>> On 25.1.2021 12.18, Andreas Hartmann wrote:
>>>>
>>>> Hello!
>>>>
>>>> Meanwhile I found the culprit:
>>>>
>>>> https://www.spinics.net/lists/linux-usb/msg141467.html
>>>> and
>>>> https://www.spinics.net/lists/linux-usb/msg141468.html
>>>>
>>>> Especially the last change breaks things here completely. After removing them
>>>> by the attached patch, problems are gone and device works again as expected
>>>> (I tested with the original 24 kB bulk size which was horribly broken w/o the
>>>> attached patch). This means: the additional repair steps are not just breaking
>>>> things but are even unnecessary (it's working perfectly without those changes)
>>>> here.
>>>
>>> Unfortunately this isn't enough to remove the alignment code for those
>>> controllers. This is just once specific usecase. We need to figure out what
>>> really goes wrong.
>>>
>>> Looks like 0 bytes is copied from sg list to bounce buffer when we want 512
>>> bytes copied. Just noticed the alignment code assumes sg lists are used without
>>> checking it first.
>>>
>>> Could you add the below code and test again, it should print more debugging info.
>>
>> See the attached file. That's the result of two times coping 1.3 GB via scp.
>>
>> As the transfer mostly breaks after the wrong alignments and because
>> there isn't any further alignment needed at all, I didn't do more tests.
>> Hope this helps. Most importantly it should be investigated, why there
>> isn't any additional alignment needed at all.
> 
> I'm not sure if it's important for you to know: The driver doesn't use struct scatterlist or num_mapped_sgs at all (if it's meant to be used by the sender at all).
> 
> But it sets URB_NO_TRANSFER_DMA_MAP (for data transfer among others).
> 
> Mlme packets are sent w/o bulk and w/o setting URB_NO_TRANSFER_DMA_MAP. All other packets are sent with URB_NO_TRANSFER_DMA_MAP turned on.
> 

Ok, thanks, I see what's going on here.

Short recap of xhci alignment requirements.
1. Data pointed to by a transfer request block (TRB) may not span 64k boundary
2. If a transfer contains several TRBs, and spans over two TRB ringbuffer
   segments, then the sum of the TRB data in the first segment must be a 
   multiple of max packets in size.
 
Code assumes that if transfer is split into several blocks,(TRBs) and a block
in the middle of a transfer is smaller than max packet size, then it must be sg list.

But this is not necessarily the case if data was already DMA mapped beforehand.
Data might start just before a 64k boundary, causing first TRB to be less than
packet size.

I'll start implementing a fix for this.

-Mathias