From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D8CEDC04AAF for ; Tue, 21 May 2019 06:08:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id AF12C217D7 for ; Tue, 21 May 2019 06:08:27 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=nvidia.com header.i=@nvidia.com header.b="cugZYLcH" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727867AbfEUGI0 (ORCPT ); Tue, 21 May 2019 02:08:26 -0400 Received: from hqemgate14.nvidia.com ([216.228.121.143]:11432 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725885AbfEUGIW (ORCPT ); Tue, 21 May 2019 02:08:22 -0400 Received: from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by hqemgate14.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Mon, 20 May 2019 23:08:23 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate102.nvidia.com (PGP Universal service); Mon, 20 May 2019 23:08:21 -0700 X-PGP-Universal: processed; by hqpgpgate102.nvidia.com on Mon, 20 May 2019 23:08:21 -0700 Received: from [10.19.108.117] (172.20.13.39) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Tue, 21 May 2019 06:08:19 +0000 Subject: Re: [Patch V3 5/8] arm64: tegra: Add xudc node for Tegra210 To: Nagarjuna Kristam , , , , , , CC: , , References: <1557988772-15406-1-git-send-email-nkristam@nvidia.com> <1557988772-15406-6-git-send-email-nkristam@nvidia.com> From: JC Kuo Message-ID: <9a2f3c3f-1010-8390-26b4-4e2129879a2e@nvidia.com> Date: Tue, 21 May 2019 14:08:18 +0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.6.1 MIME-Version: 1.0 In-Reply-To: <1557988772-15406-6-git-send-email-nkristam@nvidia.com> X-Originating-IP: [172.20.13.39] X-ClientProxiedBy: HQMAIL103.nvidia.com (172.20.187.11) To HQMAIL107.nvidia.com (172.20.187.13) Content-Type: text/plain; charset="utf-8"; format=flowed Content-Transfer-Encoding: 7bit Content-Language: en-US DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1558418903; bh=jB2F7CpPLqJoP3h+uRcRuTAavPJYRjygQVt4pTWGiC4=; h=X-PGP-Universal:Subject:To:CC:References:From:Message-ID:Date: User-Agent:MIME-Version:In-Reply-To:X-Originating-IP: X-ClientProxiedBy:Content-Type:Content-Transfer-Encoding: Content-Language; b=cugZYLcHlNRgjlsWn3HfqEeVzRmKRFKM5Gfba8c88ltVTyObQ+7skZ5+hCLnho3lY ICdBaLTNR/pwm/UsvCdX0Mx1vAJoiY4rZlPxvF7aikNuJ7GLmrIDyQ/9mPT6cIXDGg DjZ5mSZt9Yb4raIriWhLNFpp40x/H/rlKp9ueKZ2c5a1geUL7U0g98ybk62jKfqu7c hz1ENH8rPujqCQFOlSuaacxaZcpTJQZPaS90tCtkvqKuf6h7o9snlB+5tD8P5zhsua jDeaMNMOePVm9ytRyhdZRKRvJ1WFnuMfhiOJySwuUcz9GBHBQ+IMjNNsdFfSPThQZC 9egbOOgmgldiA== Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Reviewed-by: JC Kuo Thanks, JC On 5/16/19 2:39 PM, Nagarjuna Kristam wrote: > Tegra210 has one XUSB device mode controller, which can be operated > HS and SS modes. Add DT support for XUSB device mode controller. > > Signed-off-by: Nagarjuna Kristam > --- > arch/arm64/boot/dts/nvidia/tegra210.dtsi | 19 +++++++++++++++++++ > 1 file changed, 19 insertions(+) > > diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi > index a550c0a..edef00b 100644 > --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi > +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi > @@ -1184,6 +1184,25 @@ > status = "disabled"; > }; > > + xudc@700d0000 { > + compatible = "nvidia,tegra210-xudc"; > + reg = <0x0 0x700d0000 0x0 0x8000>, > + <0x0 0x700d8000 0x0 0x1000>, > + <0x0 0x700d9000 0x0 0x1000>; > + interrupts = ; > + clocks = <&tegra_car TEGRA210_CLK_XUSB_DEV>, > + <&tegra_car TEGRA210_CLK_XUSB_SS>, > + <&tegra_car TEGRA210_CLK_XUSB_SSP_SRC>, > + <&tegra_car TEGRA210_CLK_XUSB_HS_SRC>, > + <&tegra_car TEGRA210_CLK_XUSB_FS_SRC>; > + clock-names = "dev", "ss", "ss_src", > + "hs_src", "fs_src"; > + power-domains = <&pd_xusbdev>, <&pd_xusbss>; > + power-domain-names = "dev", "ss"; > + nvidia,xusb-padctl = <&padctl>; > + status = "disabled"; > + }; > + > mipi: mipi@700e3000 { > compatible = "nvidia,tegra210-mipi"; > reg = <0x0 0x700e3000 0x0 0x100>;