From: Rob Herring <robh@kernel.org>
To: Dinh Nguyen <dinguyen@kernel.org>
Cc: hminas@synopsys.com, linux-usb@vger.kernel.org,
robh+dt@kernel.org, gregkh@linuxfoundation.org,
devicetree@vger.kernel.org
Subject: Re: [PATCH 1/3] dt-bindings: usb: dwc2: add compatible "intel,socfpga-agilex-hsotg"
Date: Tue, 8 Feb 2022 21:19:25 -0600 [thread overview]
Message-ID: <YgMyvUdlNd1J7J6R@robh.at.kernel.org> (raw)
In-Reply-To: <20220125161821.1951906-1-dinguyen@kernel.org>
On Tue, 25 Jan 2022 10:18:19 -0600, Dinh Nguyen wrote:
> Add the compatible "intel,socfpga-agilex-hsotg" to the DWC2
> implementation, because the Agilex DWC2 implementation does not support
> clock gating.
>
> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
> ---
> Documentation/devicetree/bindings/usb/dwc2.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
Acked-by: Rob Herring <robh@kernel.org>
next prev parent reply other threads:[~2022-02-09 4:07 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-25 16:18 [PATCH 1/3] dt-bindings: usb: dwc2: add compatible "intel,socfpga-agilex-hsotg" Dinh Nguyen
2022-01-25 16:18 ` [PATCH 2/3] usb: dwc2: Add platform specific data for Intel's Agilex Dinh Nguyen
2022-02-01 5:15 ` Minas Harutyunyan
2022-01-25 16:18 ` [PATCH 3/3] arm64: dts: agilex: use the compatible "intel,socfpga-agilex-hsotg" Dinh Nguyen
2022-03-18 14:34 ` Krzysztof Kozlowski
2022-02-09 3:19 ` Rob Herring [this message]
2022-03-18 14:40 ` [PATCH 1/3] dt-bindings: usb: dwc2: add " Krzysztof Kozlowski
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