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From: Mika Westerberg <mika.westerberg@linux.intel.com>
To: Sanjay R Mehta <sanmehta@amd.com>
Cc: Sanjay R Mehta <Sanju.Mehta@amd.com>,
	andreas.noever@gmail.com, michael.jamet@intel.com,
	YehezkelShB@gmail.com, Basavaraj.Natikar@amd.com,
	mario.limonciello@amd.com, linux-usb@vger.kernel.org
Subject: Re: [PATCH] thunderbolt: handle runtime pm for tunnelled pci root port
Date: Mon, 7 Mar 2022 16:46:43 +0200	[thread overview]
Message-ID: <YiYa0wCfGi39D8t5@lahna> (raw)
In-Reply-To: <ade3f693-118b-369d-8dcb-8cc9c78fa39c@amd.com>

Hi,

On Mon, Mar 07, 2022 at 08:00:46PM +0530, Sanjay R Mehta wrote:
> 
> 
> On 3/7/2022 7:05 PM, Mika Westerberg wrote:
> > Hi Sanjay,
> > 
> > On Mon, Mar 07, 2022 at 07:05:19AM -0600, Sanjay R Mehta wrote:
> >> From: Sanjay R Mehta <sanju.mehta@amd.com>
> >>
> >> Carry out runtime-resume of PCI tunnelled root port to handle
> >> hotplug interrupts synchronously.
> > 
> > What problem does this solve?
> > 
> > Typically the root ports should be able to wake from D3 when the PCIe
> > tunnel gets established. Is it not the case here?
> 
> Yes Mika, its not waking from D3 in this case on our hardware.
> 
> Hence I have kept a check to execute this code only if root port still
> in D3 after PCIe tunnel is setup.

OK, I see.

> Do you think should this patch go as a quirk?

I think in that case we should prevent the port from entering D3.  Does
it have the ACPI "HotPlugSupportInD3" property:

  https://docs.microsoft.com/en-us/windows-hardware/drivers/pci/dsd-for-pcie-root-ports#identifying-pcie-root-ports-supporting-hot-plug-in-d3

If yes, then simply removing that should work.

      reply	other threads:[~2022-03-07 14:49 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-07 13:05 [PATCH] thunderbolt: handle runtime pm for tunnelled pci root port Sanjay R Mehta
2022-03-07 13:35 ` Mika Westerberg
2022-03-07 14:30   ` Sanjay R Mehta
2022-03-07 14:46     ` Mika Westerberg [this message]

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