Re: [PATCH v13 29/35] usb: dwc3: core: support PHY reset notifications

[Thinh Nguyen <Thinh.Nguyen@synopsys.com>]

On Tue, Jul 14, 2026, Sebastian Reichel wrote:
> On recent Rockchip platforms (at least RK3588 & RK3576), DWC3 IP is used
> with a USBDP PHY providing USB3 and DP. This PHY needs to be reset when
> the mode changes, which may happen when plugging in different USB-C
> devices.
> 
> If the USBDP PHY resets with the DWC3 IP running, its internal state
> corrupts resulting in the USBDP PHY not being able to lock some PLL
> clocks, which effectively renders USB3 unusable.
> 
> To fix the issue this adds handling for the new PHY framework reset
> notifications, which will assert PHYSOFTRST before the actual PHY
> is disabled and will deassert it once the PHY returns.
> 
> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
> ---
>  drivers/usb/dwc3/core.c | 101 ++++++++++++++++++++++++++++++++++++++++++++++++
>  drivers/usb/dwc3/core.h |  18 +++++++++
>  2 files changed, 119 insertions(+)
> 

These changes should not be in the core. This is specific to Rockchip
and not every phy needs this. Perhaps you can create a new glue driver
for this.

Thanks,
Thinh