Re: [PATCH v2 2/4] usb: xhci: Honor PORTSC.TM if valid

[Thinh Nguyen <Thinh.Nguyen@synopsys.com>]

On Tue, Jul 28, 2026, Konrad Dybcio wrote:
> On 7/23/26 12:57 AM, Thinh Nguyen wrote:
> > On Wed, Jul 15, 2026, Konrad Dybcio wrote:
> >> From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
> >>
> >> Currently, the only way for the USB core to determine whether the link
> >> is native or tunneled is via an Intel vendor-specific Extended
> >> Capability.
> 
> [...]
> 
> >> -	/* Don't try and probe this capability for non-Intel hosts */
> >> +	/* Prefer the XHCI v1.2 ext_cap if advertised */
> >> +	offset = xhci_find_next_ext_cap(base, 0, XHCI_EXT_CAPS_USB3_TUNNELING);
> >> +	if (offset) {
> >> +		if (!(readl(base + offset) & XHCI_USB3_TUNNELING_SUPPORTED))
> >> +			return USB_LINK_NATIVE;
> > 
> > Second, don't return early here. Check if XHCI_EXT_CAPS_USB3_TUNNELING
> > present and supported:
> 
> So if the extcap is supported and exposed, but it says "this port
> is not tunneling-capable", can we not trust that data?
> > 
> > 	if (offset && (readl(base + offset) & XHCI_USB3_TUNNELING_SUPPORTED)) {
> > 
> >> +
> >> +		val = xhci_portsc_readl(port);
> >> +		if (val & PORT_TM)
> >> +			return USB_LINK_TUNNELED;
> >> +
> >> +		return USB_LINK_NATIVE;
> >> +	}
> 
> Your proposed change says "if !USB3_TUNNELING_SUPPORTED, assume it may
> still be supported via the Intel ext_cap below"
> 

Ignore this suggestion. It was tied to the idea of overriding standard
checks.

Thanks,
Thinh