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[103.229.18.19]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-14340a69666sm3798517c88.9.2026.09.06.21.02.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 06 Sep 2026 21:03:03 -0700 (PDT) Date: Mon, 7 Sep 2026 09:32:55 +0530 From: Varadarajan Narayanan To: george.moussalem@outlook.com Cc: Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Wesley Cheng , Thinh Nguyen , Bjorn Andersson , Konrad Dybcio , linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 01/10] usb: dwc3: core: Allow glue layer to pass reference clock rate Message-ID: References: <20260906-ipq-flatten-usb-v2-0-dab83120b10a@outlook.com> <20260906-ipq-flatten-usb-v2-1-dab83120b10a@outlook.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260906-ipq-flatten-usb-v2-1-dab83120b10a@outlook.com> X-Proofpoint-ORIG-GUID: 6LbFKreSiAb18URMwxtUu3Rxo-7dSqmO X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTA3MDAzOSBTYWx0ZWRfX/qfePaqchYTC fZm6CEkFQI5Q4JkWVZxMR3TkYbeyEt8YcPM+qh7GCkm/WEzO0iBz8DT2+yW7MfNI1xfuVUWTtK9 C9Jj+UjLNv07JfxSliFTj/hzLy6JHRk1kk0Vmiw3IjsnPcx4knndyBft6FAgmSGuTd8/dVwHOww HSqGbZ+VVT+oAUmwvkb5U/6waoVf6si4NgmWckEl8ZY8wI4TYgmkQmy7i3ePrPaiyNeP4KpSFWc sco8xbPClZFN3EYU0Dh7dCSqWsp75bk+wxGqISxlLCyjps750i7qtHXHzBZn7QRoo4ycUgRo6bj y89q0mLkZnyHlwSdx9G8CGvq/cxSUIWAS55k/iYv0aVQxaPqkTBa12KEJ09/lbyPx40bG5mK5QD cGQUAgcztNRG7IqOzd8S+hOyuKNIoFVHYC5i3PR1flBWwwweakX4naEMXARYYiKobBfGW3F9YsT +W5wZsrJWLcvQYjghtw== X-Proofpoint-Spam-Info: AW1haW4tMjYwOTA3MDAzOSBTYWx0ZWRfX6MIhn5a2Sfes EJHnBflnbQXuLRfT81OLBkr2DDgkns9uHsAsHMSyFU96cCpshZY6oUiD0GoHZIYluZ9GVrKgS5g S+ZOlRuqMdqf/fuurx4gI6V7k4X4H10= X-Authority-Analysis: v=2.4 cv=OceoyBTY c=1 sm=1 tr=0 ts=6a9e377e cx=c_pps a=RP+M6JBNLl+fLTcSJhASfg==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=kj9zAlcOel0A:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=ZpdpYltYx_vBUK5n70dp:22 a=UqCG9HQmAAAA:8 a=EUspDBNiAAAA:8 a=J1aC8j_Z7Edc-Vy2RqkA:9 a=CjuIK1q_8ugA:10 a=iS9zxrgQBfv6-_F4QbHw:22 X-Proofpoint-GUID: 6LbFKreSiAb18URMwxtUu3Rxo-7dSqmO X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-07_01,2026-09-03_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 bulkscore=0 priorityscore=1501 suspectscore=0 phishscore=0 malwarescore=0 impostorscore=0 adultscore=0 spamscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2609070039 On Sun, Sep 06, 2026 at 07:52:40AM +0400, George Moussalem via B4 Relay wrote: > From: George Moussalem > > Add ability to pass the reference clock rate from the glue layer to the > DWC3 core driver. The core calculates the reference clock period and > frame length adjustment based on the reference clock rate. > > In the flattened snsp-dwc3 model, it is currently not possible to pass a > reference clock that differs from the default since: > commit 613a2e655d4d ("usb: dwc3: core: Expose core driver as library") > > The new glue layers (incl. Qualcomm's) set the ignore_clocks_and_resets > flag in dwc3_probe_data to true, which disables the core driver's clock > management, thus it also doesn't acquire the reference clock from the > devicetree needed in dwc3_ref_clk_period. > > There's an existing DT property 'snps,ref-clock-period-ns', but that's > been deprecated. In addition, basing the rate from the period is often > not accurate enough to derive the frame length adjustment value. > > This prevents moving chipsets such as IPQ5018, IPQ6018, IPQ5332, IPQ5424 > and IPQ9574 with a reference clock rate that computes values for the > period and frame length adjustment different from the hardware default > from moving to the flattened model. > > So, add ability to set the reference clock rate in dwc3_probe_data, then > have the core obtain the clock rate and use that to calculate the > required period and frame length adjustment. > > Signed-off-by: George Moussalem Reviewed-by: Varadarajan Narayanan