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Wed, 15 Jul 2026 21:12:42 -0700 (PDT) X-Received: by 2002:a17:90b:17ce:b0:38d:9eda:fa04 with SMTP id 98e67ed59e1d1-38e3d134073mr1049402a91.2.1784175162366; Wed, 15 Jul 2026 21:12:42 -0700 (PDT) Received: from [10.217.219.121] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-3140e545bb7sm5558475eec.3.2026.07.15.21.12.37 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 15 Jul 2026 21:12:41 -0700 (PDT) Message-ID: Date: Thu, 16 Jul 2026 09:42:35 +0530 Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 1/2] dt-bindings: qcom,snps-dwc3: Add property indicating presence of eUSB2 phy To: Thinh Nguyen Cc: Peter Chen , Krzysztof Kozlowski , Dmitry Baryshkov , Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Wesley Cheng , "linux-arm-msm@vger.kernel.org" , "linux-usb@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" References: <20260710-warping-resolute-wasp-e4b8ce@quoll> <7a099224-ea95-40ec-b279-f8834f261e23@kernel.org> Content-Language: en-US From: Krishna Kurapati In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Info: AW1haW4tMjYwNzE2MDAzOCBTYWx0ZWRfX1+glNb99NZUi fngwR4fVplbFpkJcYauHAHzvjO375TsPxcLW8E+WLFmJHFJK4mAwPqwtDZHa7rnNQz9UQxQhviQ 7sJKnEsWmkW/uckdi8oMBW7a2rfW+/o= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzE2MDAzOCBTYWx0ZWRfXzcsJ5G/1B5N0 HUkrVNAec/A03VSTShzD/hRAUeXLmj7ZcIprZL2hRb5cRQ288ZbW13kx99c+0OJAgG65hYMt64Q Qf7LEG9KYJ5zfAwG6ELieYaS5vLODtVgP+n54s4V8Ski6bZixdby+VCErcYtGHQ2dCGGPpBRU8D M5YhZgwZRF9cpd8nz+tAhaaL4Sfp9tzaPMQF3dZaFLiE2I7iIqUpa0RTMX1yc1d9X9fAqi6864u CozioyJ68dMu9UtfO6sC5wr9T/xd/7bV/c2jO9E8zUogAenCWH8mL8r2zw/dZLXr2Olb+eD90lC 9ZbG721SIxZupNVTSrLeCuI6FyMwpFegD1nngFLmzF6n7GjHy7LvF475aVC4IWnfdAQ0fDZDgKV kPKI+3+Jgb0o64XF24RmsEpptTR58RnW+yc77F8+/U0NZWSnMlAwxKyR4y2gAhM5DgttxNwe+Q+ X/xZuJZDwuZPsW6LoHg== X-Proofpoint-ORIG-GUID: 3aKDJn2hHuVtfrmo6ITKsF2M7qer0BXz X-Authority-Analysis: v=2.4 cv=Lt2iDHdc c=1 sm=1 tr=0 ts=6a585a3b cx=c_pps a=UNFcQwm+pnOIJct1K4W+Mw==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yx91gb_oNiZeI1HMLzn7:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=08YGO8N92OaCWiTnn_kA:9 a=QEXdDO2ut3YA:10 a=uKXjsCUrEbL0IQVhDsJ9:22 X-Proofpoint-GUID: 3aKDJn2hHuVtfrmo6ITKsF2M7qer0BXz X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-16_02,2026-07-15_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 impostorscore=0 lowpriorityscore=0 priorityscore=1501 malwarescore=0 adultscore=0 spamscore=0 suspectscore=0 clxscore=1015 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607160038 On 7/16/2026 4:49 AM, Thinh Nguyen wrote: > On Wed, Jul 15, 2026, Krishna Kurapati wrote: >> >> >> On 7/15/2026 4:53 AM, Thinh Nguyen wrote: >>> On Mon, Jul 13, 2026, Peter Chen wrote: >>>> On 26-07-13 23:41:14, Thinh Nguyen wrote: >>>>> On Mon, Jul 13, 2026, Peter Chen wrote: >>>>>> On 26-07-13 08:26:59, Krzysztof Kozlowski wrote: >>>>>>>>> And Dmitry already said this at v3. >>>>>>>> >>>>>>>> And I've already responded to his comment in v3: >>>>>>>> https://urldefense.com/v3/__https://lore.kernel.org/linux-usb/ahjYwJtiMsm0BcCh@vbox/__;!!A4F2R9G_pg!YksJ0tPtRth9ez8t0GB_WaxH3ynx3ya8M8aFIyKfYpApRC_79Ig93CqE2MKcrGJ6O6t_Dl3RD1zftrnxhdtcfoW7hgep8w$ >>>>>>> >>>>>>> It does not change the fact that type of phy is implied by compatible, >>>>>>> thus you do not get a new property. >>>>>>> >>>>>>> >>>>>> >>>>>> For USB2 PHY, it has property "phy_type" already, it could extend support >>>>>> list to eUSB2 like below, dwc3 qcom glue layer could call of_usb_get_phy_mode >>>>>> or re-use dwc3->hsphy_mode depends on where it needs to use. >>>>>> >>>>>> diff --git a/drivers/usb/phy/of.c b/drivers/usb/phy/of.c >>>>>> index 1ab134f45d67..5cbf17d493ad 100644 >>>>>> --- a/drivers/usb/phy/of.c >>>>>> +++ b/drivers/usb/phy/of.c >>>>>> @@ -16,6 +16,7 @@ static const char *const usbphy_modes[] = { >>>>>> [USBPHY_INTERFACE_MODE_ULPI] = "ulpi", >>>>>> [USBPHY_INTERFACE_MODE_SERIAL] = "serial", >>>>>> [USBPHY_INTERFACE_MODE_HSIC] = "hsic", >>>>>> + [USBPHY_INTERFACE_MODE_EUSB2] = "eusb2", >>>>>> }; >>>>>> >>>>>> >>>>> >>>>> eusb2 uses utmi, so it doesn't fit here as a separate mode. >>>>> >>>> >>>> Hi Thinh >>>> >>>> Yes, eUSB2 is based on UTMI Parallel mode, but it has dedicated >>>> Physical Layer Supplement [1], eg at CH2.4, it lists eUSB2 PHY >>>> Features. >>>> >>>> >>>>> To go this route properly, we'd need to introduce a new phy type >>>>> attribute in the phy framework, which will be a bigger change that may >>>>> impact more than this driver. >>>>> >>>> >>>> It is not at generic PHY framework, it is just for USB PHY dedicated. >>>> >>>> I do not see big changes, it only needs to change above files and related >>>> dt-binding files, and other users may leverage it if the controller >>>> has special sequence or settings for eUSB2. >>>> >>> >>> The usbphy_modes describes the interface between the controller and the >>> phy. eusb2 still uses utmi, so adding eusb2 there is sematically >>> incorrect. If we introduce the eusb2 mode there, we'd have to audit dwc3 >>> and every other driver that uses usbphy_modes to handle the new mode >>> correctly. >> >> Hi Thinh, >> >> I don't think any existing drivers need to be modified after adding this. If >> anyone wants to use the newly added enum for any eusb2 specific purpose, >> they can do so in a diff change/patch I guess. >> > > At minimum, dwc3 needs to be reviewed and updated for dwc->hsphy_mode > check when configuring GUSB2PHYCFG. Regardless, phy type should not be a > usbphy_modes enum as I noted above. > We can just add the enum for eusb2 in of.c as pointed by Peter in [1], read that in dwc3-qcom.c and use it during suspend resume for interrupt handling and to modify the DWC3_GUSB2PHYCFG_EUSB2OPMODE bit once we are modifying it in core. [1]: https://lore.kernel.org/all/alhDjZ0gJZq_7G6z@hu-petche-lv.qualcomm.com/ Regards, Krishna,