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Piccoli" , Felipe Balbi , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, linux-hardening@vger.kernel.org, Devarsh Thakkar , Hari Nagalla , linux@ew.tq-group.com Date: Mon, 09 Dec 2024 14:55:31 +0100 In-Reply-To: References: <95ff66ca2c89f69d893c2ce9eed9a0c677633c7b.1733737487.git.matthias.schiffer@ew.tq-group.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.52.3-0ubuntu1 Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Last-TLS-Session-Version: TLSv1.3 On Mon, 2024-12-09 at 14:24 +0100, Andrew Lunn wrote: >=20 > > +&cpsw_port1 { > > + phy-mode =3D "rgmii-rxid"; > > + phy-handle =3D <&cpsw3g_phy0>; > > +}; > > + > > +&cpsw_port2 { > > + phy-mode =3D "rgmii-rxid"; > > + phy-handle =3D <&cpsw3g_phy3>; > > +}; >=20 > rgmii-rxid is very odd. >=20 > > + > > +&cpsw3g_mdio { > > + status =3D "okay"; > > + pinctrl-names =3D "default"; > > + pinctrl-0 =3D <&main_mdio1_pins>; > > + > > + cpsw3g_phy0: ethernet-phy@0 { > > + compatible =3D "ethernet-phy-ieee802.3-c22"; > > + reg =3D <0x0>; > > + reset-gpios =3D <&main_gpio1 11 GPIO_ACTIVE_LOW>; > > + reset-assert-us =3D <1000>; > > + reset-deassert-us =3D <1000>; > > + ti,rx-internal-delay =3D ; >=20 > I guess this is the explanation. >=20 > What happens when you use rgmii-id, and don't have this delay here? > That would be normal. >=20 > Andrew This is normal for AM62-based boards, see the DTSI of the TI reference starterkit for example: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arc= h/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi#n451 With rgmii-id, both ti,rx-internal-delay and ti,tx-internal-delay should be= set. As ti,*-internal-delay sets the delay on the PHY side, phy-mode "rgmii" is = the one that would not use either: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Doc= umentation/devicetree/bindings/net/ti,dp83867.yaml#n78 At the end of the day, does it really matter as long as MAC and PHY agree o= n the used mode? We copied this part of the hardware design from the TI reference board, and did our hardware qualification with these settings, so I think i= t makes sense to use the same phy-mode configuration. Best regards, Matthias --=20 TQ-Systems GmbH | M=C3=BChlstra=C3=9Fe 2, Gut Delling | 82229 Seefeld, Germ= any Amtsgericht M=C3=BCnchen, HRB 105018 Gesch=C3=A4ftsf=C3=BChrer: Detlef Schneider, R=C3=BCdiger Stahl, Stefan Sch= neider https://www.tq-group.com/