From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E84562D0C82; Wed, 1 Apr 2026 14:34:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.11 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775054083; cv=none; b=NVfyl/QcryfozaAlyPDz06bqS4+J4GSP6K15EjAMUDMAeUVBGtdiZOwBnoLuYFt2r0WxKYUTPehSazY+iZBt32bCr+IUB8rH2pVenucj+8BHOsXeDCLMBlYpMC5QXnX8XTgOknpo+/f6U7WJ879IpJ+O8Ue8/osXBYP8fN/nICw= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775054083; c=relaxed/simple; bh=WKu5Fs8rib/9n9JZLw2RfnLQuKbJU3PyLefIR9RuzPA=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=q4mP9yGz/wC9qgiLMktlx+9++uQ5BJCfnCD98cWy3U8miVAxYou7vqzjwGg8xsVg+iRwxR2jdvsRy6gzr64j4VOfWDpoAz8v9bvSMH6uPtdzECWYsVnL7CX7ijkcHk2Cgl9Mv4y1AmEKR0txmMeQphsdHENGsR86e8KMHfJpVqs= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=I9tBhi3k; arc=none smtp.client-ip=192.198.163.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="I9tBhi3k" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1775054082; x=1806590082; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; bh=WKu5Fs8rib/9n9JZLw2RfnLQuKbJU3PyLefIR9RuzPA=; b=I9tBhi3kIt0k81nZErwVdcwonH0jHs5eUND3825bJX80Z47Hvaoy7GBx jMYKZ5TqqSzbyVqOqEMDjWCr0dxjKZ1KPgG4W0nhFf0FBzrR9vdpBf/+E BGokUiKQICq9cb1o9ObObxkpJw70JgbEvsfBxhUjVzgmsdRvdrFGCYszZ /5gZhG0N3wpXLlXyJ17NmamiTYd9VMnoDRvs8rmydk5kqvVv6dWbiw7I5 JF0N5NoOWjTTpZdQTNcMDHRzLtK8p1wQ3QRg3ZEMugp9zEVBypOT7N5FG RIS2PDSdlqIIcZtvRVtuqaDAu3nFAn3yGaQvylDb8B2S6IuH5eHFgmGMp Q==; X-CSE-ConnectionGUID: pMS2DcxRTpCnuZVXL925vg== X-CSE-MsgGUID: F/wnq3QETH2rcKYwynO8vA== X-IronPort-AV: E=McAfee;i="6800,10657,11745"; a="86707847" X-IronPort-AV: E=Sophos;i="6.23,153,1770624000"; d="scan'208";a="86707847" Received: from fmviesa006.fm.intel.com ([10.60.135.146]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Apr 2026 07:34:41 -0700 X-CSE-ConnectionGUID: EFfqiJHOSqWSzSqBDaMtYw== X-CSE-MsgGUID: hQhqmsxATbePcnS6k39SLA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,153,1770624000"; d="scan'208";a="221850626" Received: from vpanait-mobl.ger.corp.intel.com (HELO [10.245.244.145]) ([10.245.244.145]) by fmviesa006-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Apr 2026 07:34:40 -0700 Message-ID: Date: Wed, 1 Apr 2026 17:34:37 +0300 Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] usb: xhci: Make usb_host_endpoint.hcpriv survive endpoint_disable() To: Michal Pecio , Mathias Nyman , Greg Kroah-Hartman Cc: Alan Stern , linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org References: <20260331010654.269ac270.michal.pecio@gmail.com> Content-Language: en-US From: Mathias Nyman In-Reply-To: <20260331010654.269ac270.michal.pecio@gmail.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 3/31/26 02:06, Michal Pecio wrote: > xHCI hardware maintains its endpoint state between add_endpoint() > and drop_endpoint() calls followed by successful check_bandwidth(). > So does the driver. > > Core may call endpoint_disable() during xHCI endpoint life, so don't > clear host_ep->hcpriv then, because this breaks endpoint_reset(). > > If a driver calls usb_set_interface(), submits URBs which make host > sequence state non-zero and calls usb_clear_halt(), the device clears > its sequence state but xhci_endpoint_reset() bails out. The next URB > malfunctions: USB2 loses one packet, USB3 gets Transaction Error or > may not complete at all on some (buggy?) HCs from ASMedia and AMD. > This is triggered by uvcvideo on bulk video devices. Were you able to trigger a usb_clear_halt() called with ep->hcpriv == NULL, causing a toggle/seq mismatch? The ep->hcpriv should be set back correctly in usb_set_interface(): usb_set_interface() usb_hcd_alloc_bandwidth() hcd->driver->add_endpoint() xhci_add_endpoint() ep->hcpriv = udev; I'm not against this patch, but would like to understand how we end here Thanks Mathias