From: Alan Borzeszkowski <alan.borzeszkowski@linux.intel.com>
To: Neo <liqys@vip.qq.com>, linux-usb <linux-usb@vger.kernel.org>
Cc: "andreas.noever" <andreas.noever@gmail.com>,
westeri <westeri@kernel.org>,
YehezkelShB <YehezkelShB@gmail.com>
Subject: Re: [PATCH RFC] thunderbolt: Add JHL9580 Barlow Ridge (TB5) ICM support — host_reset timeout blocking PCIe tunneling
Date: Fri, 03 Jul 2026 18:48:54 +0200 [thread overview]
Message-ID: <e488a87aa3bf3e7dc53e8b9b2533ee8c6760a86a.camel@linux.intel.com> (raw)
In-Reply-To: <tencent_B67BF923C66EC476F99F9C250FDA68D3B205@qq.com>
Hi,
Please send full dmesg with 'thunderbolt.dyndbg=+p' parameter in linux
command line.
Firmware Connection Manager (ICM) is not used with Barlow Ridge, only
software CM.
On Fri, 2026-07-03 at 11:49 +0800, Neo wrote:
> Hi maintainers,
>
>
> JHL9580 Barlow Ridge (8086:5780 bridge, 8086:5781 NHI), Intel's first
> Thunderbolt 5 / USB4 v2 host controller, has incomplete support in
> the
> kernel through v7.2-rc1. The host router reset times out and PCIe
> tunneling is non-functional, making eGPU use impossible.
>
>
> === Problem Summary ===
>
>
> 1. get_upstream_port() in icm.c does not recognize Barlow Ridge
> bridge
> (0x5780). Neither does icm_probe() handle the NHI (0x5781).
>
>
> 2. With these fixed, icm_firmware_reset() → pcie2cio_write() times
> out
> (-110) on Barlow Ridge. Neither icm_ar_cio_reset (0x50/BIT(9)) nor
> icm_tr_cio_reset (0x777/BIT(1)) work.
>
>
> 3. Without ICM firmware running, REG_FW_STS (0x39944) is read-only
> and
> writes are silently ignored. USB3 tunneling works (XHCI pass-
> through)
> but PCIe tunnels are never established.
>
>
> 4. Even with software CM (tb_acpi_is_native()=1), USB4 ports show
> "link: none" and the eGPU GPU never appears in lspci.
>
>
> === Hardware ===
>
>
> Host: MSI MS-15M3 (E15M3IMS.117 BIOS, 2026-04-17)
> CPU: Intel Arrow Lake-HX Ultra 9 275HX
> TB5: Intel JHL9580 Barlow Ridge [8086:5780]/[8086:5781] (rev 84)
> eGPU: GIGABYTE AORUS RTX5090 AI BOX (USB4)
> OS: Ubuntu 26.04, kernel 7.0.0-27 (same issue on 7.0.0-22)
>
>
> === Patch Attempted (works up to firmware start) ===
>
>
> --- a/drivers/thunderbolt/icm.c
> +++ b/drivers/thunderbolt/icm.c
> @@ get_upstream_port():
> + case 0x5780: /* JHL9580 Barlow Ridge Host Bridge */
>
>
> @@ icm_probe():
> + case 0x5781: /* JHL9580 Barlow Ridge NHI */
> + icm->max_boot_acl = ICM_AR_PREBOOT_ACL_ENTRIES;
> + icm->can_upgrade_nvm = !x86_apple_machine;
> + icm->is_supported = icm_ar_is_supported;
> + icm->cio_reset = icm_ar_cio_reset;
> + icm->get_mode = icm_ar_get_mode;
> + icm->get_route = icm_ar_get_route;
> + icm->save_devices = icm_fr_save_devices;
> + icm->driver_ready = icm_ar_driver_ready;
> + icm->device_connected = icm_fr_device_connected;
> + icm->device_disconnected = icm_fr_device_disconnected;
> + icm->xdomain_connected = icm_fr_xdomain_connected;
> + icm->xdomain_disconnected = icm_fr_xdomain_disconnected;
> + tb->cm_ops = &icm_ar_ops;
> + break;
>
>
> Result: icm_probe succeeds, firmware_start begins, but
> icm_firmware_reset → pcie2cio_write times out.
>
>
> === dmesg ===
>
>
> thunderbolt 0000:04:00.0: timeout resetting host router
> (REG_RESET HRR remains 0x01 indefinitely; extended to 5000ms, no
> change)
>
>
> === Questions ===
>
>
> 1. What is the correct CIO reset sequence for Barlow Ridge?
> 2. Is the ICM firmware interface different from Alpine/Titan Ridge?
> 3. Are there plans to add native Barlow Ridge support to icm.c?
> 4. Should Barlow Ridge use software CM exclusively (skip ICM)?
>
>
> Full diagnostic logs, lspci, and ACPI DSDT excerpt available on
> request.
> Test hardware available for any proposed patches.
>
>
> Thank you,
>
> Neo
> liqys@vip.qq.com
next prev parent reply other threads:[~2026-07-03 16:48 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-03 3:49 [PATCH RFC] thunderbolt: Add JHL9580 Barlow Ridge (TB5) ICM support — host_reset timeout blocking PCIe tunneling Neo
2026-07-03 16:48 ` Alan Borzeszkowski [this message]
-- strict thread matches above, loose matches on Subject: below --
2026-07-05 13:48 Neo
2026-07-05 13:58 ` Neo
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