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From: sashiko-bot@kernel.org
To: "Sebastian Reichel" <sebastian.reichel@collabora.com>
Cc: linux-usb@vger.kernel.org, linux-phy@lists.infradead.org,
	vkoul@kernel.org, neil.armstrong@linaro.org, olteanv@gmail.com
Subject: Re: [PATCH v17 1/7] phy: rockchip: usbdp: Track PHY power state
Date: Fri, 16 Oct 2026 18:50:03 +0000	[thread overview]
Message-ID: <sashiko-outbox-174782@kernel.org> (raw)
In-Reply-To: <20261016-b4-rockchip-dwc3-rockchip-glue-v17-1-876f96893e2f@collabora.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] phy: state tracking leak in rk_udphy_usb3_phy_exit()
--

commit 71f779c7a4a8cedbd725b12e66fcbf3d92f884bf
Author: Sebastian Reichel <sebastian.reichel@collabora.com>

phy: rockchip: usbdp: Track PHY power state

Track PHY state requested by software for DP and USB3 individually
in preparation to rework and fix up power state handling.

> diff --git a/drivers/phy/rockchip/phy-rockchip-usbdp.c b/drivers/phy/rockchip/phy-rockchip-usbdp.c
> index e748acdd2d313..db69dd24f73b3 100644
> --- a/drivers/phy/rockchip/phy-rockchip-usbdp.c
> +++ b/drivers/phy/rockchip/phy-rockchip-usbdp.c

[ ... ]

> @@ -1286,16 +1293,25 @@ static const struct phy_ops rk_udphy_dp_phy_ops = {
>  static int rk_udphy_usb3_phy_init(struct phy *phy)
>  {
>  	struct rk_udphy *udphy = phy_get_drvdata(phy);
> +	int ret;
>  
>  	guard(mutex)(&udphy->mutex);
>  
> +	udphy->sw_mode |= UDPHY_MODE_USB;
> +
>  	/* DP only or high-speed, disable U3 port */
>  	if (!(udphy->mode & UDPHY_MODE_USB) || udphy->hs) {
>  		rk_udphy_u3_port_disable(udphy, true);
>  		return 0;
>  	}
>  
> -	return rk_udphy_power_on(udphy, UDPHY_MODE_USB);
> +	ret = rk_udphy_power_on(udphy, UDPHY_MODE_USB);
> +	if (ret) {
> +		udphy->sw_mode &= ~UDPHY_MODE_USB;
> +		return ret;
> +	}
> +
> +	return 0;
>  }
>  
>  static int rk_udphy_usb3_phy_exit(struct phy *phy)
> @@ -1308,6 +1324,8 @@ static int rk_udphy_usb3_phy_exit(struct phy *phy)
>  	if (!(udphy->mode & UDPHY_MODE_USB) || udphy->hs)
>  		return 0;
>  
> +	udphy->sw_mode &= ~UDPHY_MODE_USB;
> +

[Severity: Medium]
In rk_udphy_usb3_phy_init(), UDPHY_MODE_USB is unconditionally added to
sw_mode before the early return for DP-only or high-speed cases.

However, in rk_udphy_usb3_phy_exit(), the corresponding early return happens
before clearing UDPHY_MODE_USB from sw_mode.

Will this cause the sw_mode state to leak? If so, could subsequent operations
like rk_udphy_power_on() called during DP PHY initialization incorrectly see
UDPHY_MODE_USB as requested, potentially executing the DWC3 reset handler
unnecessarily?

>  	rk_udphy_power_off(udphy, UDPHY_MODE_USB);
>  
>  	return 0;

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261016-b4-rockchip-dwc3-rockchip-glue-v17-0-876f96893e2f@collabora.com?part=1

  reply	other threads:[~2026-10-16 18:50 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-16 18:43 [PATCH v17 0/7] usb: dwc3: introduce Rockchip glue driver Sebastian Reichel
2026-10-16 18:43 ` [PATCH v17 1/7] phy: rockchip: usbdp: Track PHY power state Sebastian Reichel
2026-10-16 18:50   ` sashiko-bot [this message]
2026-10-16 18:43 ` [PATCH v17 2/7] phy: rockchip: usbdp: Add reset hook support for dwc3 Sebastian Reichel
2026-10-16 18:54   ` sashiko-bot
2026-10-16 18:43 ` [PATCH v17 3/7] usb: dwc3: rockchip: introduce glue driver Sebastian Reichel
2026-10-16 18:54   ` sashiko-bot
2026-10-16 18:43 ` [PATCH v17 4/7] usb: dwc3: core: add post PHY registration hook for platform glue Sebastian Reichel
2026-10-16 18:51   ` sashiko-bot
2026-10-16 18:43 ` [PATCH v17 5/7] usb: dwc3: rockchip: add USBDP PHY reset quirk Sebastian Reichel
2026-10-16 18:55   ` sashiko-bot
2026-10-16 18:43 ` [PATCH v17 6/7] usb: gadget: define stub for usb_udc_vbus_handler Sebastian Reichel
2026-10-16 18:53   ` sashiko-bot
2026-10-16 18:43 ` [PATCH v17 7/7] usb: dwc3: rockchip: fix USB-C reconnect in gadget mode Sebastian Reichel
2026-10-16 18:56   ` sashiko-bot

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