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From: sashiko-bot@kernel.org
To: "Brian Ellis" <brianellis@gotenna.com>
Cc: linux-usb@vger.kernel.org
Subject: Re: [PATCH] usb: dwc3: apply XCVRDLY after PHY init
Date: Mon, 09 Nov 2026 17:43:22 +0000	[thread overview]
Message-ID: <sashiko-outbox-205328@kernel.org> (raw)
In-Reply-To: <20261109-dwc3-xcvrdly-after-phy-init-v1-1-488ed0a0c7da@gotenna.com>

Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [Medium] usb: dwc3: XCVRDLY not cleared before PHY init in
  dwc3_hs_phy_setup()
--

commit 94be63bcb12fab40e49af12fcead82e36a641824
Author: Brian Ellis <brianellis@gotenna.com>

usb: dwc3: apply XCVRDLY after PHY init

This commit moves dwc3_ulpi_setup() to the end of dwc3_core_init() so
that DWC3_GUSB2PHYCFG_XCVRDLY is not asserted during PHY initialization.

> diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
> index fd5c2cd36c595..9b37ceda9a81f 100644
> --- a/drivers/usb/dwc3/core.c
> +++ b/drivers/usb/dwc3/core.c
> @@ -1371,8 +1371,6 @@ int dwc3_core_init(struct dwc3 *dwc)
>  		dwc->ulpi_ready = true;
>  	}
>  
> -	dwc3_ulpi_setup(dwc);
> -
>  	if (!dwc->phys_ready) {
>  		ret = dwc3_core_get_phy(dwc);
>  		if (ret)
> @@ -1534,6 +1532,9 @@ int dwc3_core_init(struct dwc3 *dwc)
>  		dwc3_writel(dwc, DWC3_GUCTL3, reg);
>  	}
>  
> +	/* XCVRDLY must not be asserted across PHY init, so set it last. */
> +	dwc3_ulpi_setup(dwc);
> +
>  	return 0;
>  
>  err_power_off_phy:

[Severity: Medium]
Does DWC3_GUSB2PHYCFG_XCVRDLY also need to be cleared in
dwc3_hs_phy_setup() before PHY bring-up?

Once dwc3_ulpi_setup() sets DWC3_GUSB2PHYCFG_XCVRDLY at the end of the
initial dwc3_core_init(), neither dwc3_core_exit() nor
dwc3_core_soft_reset() clears it, and dwc3_hs_phy_setup() preserves the
bit when it read-modify-writes DWC3_GUSB2PHYCFG(index) (unlike
DWC3_GUSB2PHYCFG_SUSPHY, which it clears prior to PHY init).

When dwc3_core_init() runs again without a hardware reset of the global
registers (for example via dwc3_resume_common() ->
dwc3_core_init_for_resume() on ZynqMP where dwc->reset is NULL),
DWC3_GUSB2PHYCFG_XCVRDLY remains asserted across dwc3_phy_init() and
dwc3_phy_power_on(), reintroducing the high-speed link drop on resume.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261109-dwc3-xcvrdly-after-phy-init-v1-1-488ed0a0c7da@gotenna.com?part=1

  reply	other threads:[~2026-11-09 17:43 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-09 17:22 [PATCH] usb: dwc3: apply XCVRDLY after PHY init Brian Ellis via B4 Relay
2026-11-09 17:43 ` sashiko-bot [this message]
2026-11-10 13:28 ` Ingo Rohloff
2026-11-10 13:32   ` Ingo Rohloff
  -- strict thread matches above, loose matches on Subject: below --
2026-11-11 15:00 Brian Ellis (US)

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