Re: [PATCH V6 4/6] arm64/ls1043a: add DTS for Freescale LS1043A SoC

Li Yang
2015-10-26T22:45:24Z

On Fri, Oct 23, 2015 at 3:01 AM, Zhiqiang Hou <B48286@freescale.com> wrote:
> From: Mingkai Hu <Mingkai.Hu@freescale.com>
>
> LS1043a is an SoC with 4 ARMv8 A53 cores and most other IP blocks
> similar to LS1021a which complies to Chassis 2.1 spec.
>
> Following levels of DTSI/DTS files have been created for the
> LS1043A SoC family:
>
> - fsl-ls1043a.dtsi:
> DTS-Include file for FSL LS1043A SoC.
>
> Signed-off-by: Li Yang <leoli@freescale.com>
> Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
> Signed-off-by: Wenbin Song <Wenbin.Song@freescale.com>

Hi Arnd,

Can you also review and merge the LS1043 device tree related patches
in the series(3/6,4/6,6/6)?

Regards,
Leo

> ---
> V6:
> - No change.
>
> V5:
> - Move gic, timer and pmu nodes out of SoC node.
>
> V4:
> - Add soc node with simple-bus compatible.
> - Add property interrupt-affinity for armv8 pmuv3 node.
>
> V3:
> - Add device tree node for SATA.
> - Remove properity enable-method for all cpu node.
> Remove reserved memory region for spin-table.
>
> V2:
> - Add secondary core boot method.
> - Move out the sysclk node from the clockgen node.
> - Correct the reg size of GICC.
>
> arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 525 +++++++++++++++++++++++++
> 1 file changed, 525 insertions(+)
> create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi