From: Guenter Roeck <linux@roeck-us.net>
To: Matthew McClintock <mmcclint@codeaurora.org>
Cc: andy.gross@linaro.org, linux-arm-msm@vger.kernel.org,
"qca-upstream.external" <qca-upstream.external@qca.qualcomm.com>,
Wim Van Sebroeck <wim@iguana.be>,
"open list:WATCHDOG DEVICE DRIVERS"
<linux-watchdog@vger.kernel.org>,
open list <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 07/17] watchdog: qcom: add option for standalone watchdog not in timer block
Date: Mon, 28 Mar 2016 11:13:56 -0700 [thread overview]
Message-ID: <20160328181356.GA29820@roeck-us.net> (raw)
In-Reply-To: <D54FA5B6-F170-40D3-BF0D-60D40A2C2829@codeaurora.org>
On Mon, Mar 28, 2016 at 11:55:28AM -0500, Matthew McClintock wrote:
>
> > On Mar 25, 2016, at 11:23 AM, Guenter Roeck <linux@roeck-us.net> wrote:
> >
> >> -#define WDT_RST 0x38
> >> -#define WDT_EN 0x40
> >> -#define WDT_BITE_TIME 0x5C
> >> +enum wdt_reg {
> >> + WDT_RST,
> >> + WDT_EN,
> >> + WDT_BITE_TIME,
> >> +};
> >> +
> >> +static const u32 reg_offset_data_apcs_tmr[] = {
> >> + [WDT_RST] = 0x38,
> >> + [WDT_EN] = 0x40,
> >> + [WDT_BITE_TIME] = 0x5C,
> >> +};
> >> +
> >> +static const u32 reg_offset_data_kpss[] = {
> >> + [WDT_RST] = 0x4,
> >> + [WDT_EN] = 0x8,
> >
> > Does this work ? In the datasheet I have in front of me (APQ8064), the watchdog
> > at this address uses different bits. At address 0x40 (eg GSS_A5_APCS_WDT0_EN),
>
> 0x40 is acps_tmr, and looks fine.
>
> > bit 0 is the enable bit, and bit 1 enables interrupts. At address 0x08 (eg
> > LPASS_QDSP6SS_WDOG_UNMASKED_INT_EN), bit 0 enables interrupts and bit 1 is
> > undefined.
>
> I honestly don’t see anything at 0x8 for either blocks that looks like this. For the new block bit 0 is enabling and bit 1 enabled interrupts.
>
That is from the APQ8064 datasheet.
> > Or does "qcom,kpss-standalone" refer to some other watchdog ?
>
> APQ8064 would be the apcs_tmr block variant which is unchanged. MSM8916 as well as IPQ4019 would use the new kpss variant.
>
Unfortunately I don't have access to those datasheets.
> I went with block names I found internally here, but I will be the first to admit I am terrible at names. The old block name for APQ was CPU0_ACPS_TMR (where really the watchdog is a subset of a timer block), and on the IPQ4019 it’s called APCS_KPSS_WDT and it’s really just a watchdog block.
>
> I kept the same driver because the register’s currently in use were compatible. By the way, I tested this on an IPQ806x and IPQ4019 both new and old blocks.
>
The property name should probably be something like 'qcom,kpss-wdt'
(or 'qcom,kpss-watchdog' ?), possibly in addition to 'qcom,kpss-ipq4019-wdt'
and 'qcom,kpss-msm8916-wdt'.
Guenter
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next prev parent reply other threads:[~2016-03-28 18:13 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1458770712-10880-1-git-send-email-mmcclint@codeaurora.org>
2016-03-23 22:05 ` [PATCH 06/17] watchdog: qcom: update device tree bindings Matthew McClintock
2016-03-23 22:26 ` Stephen Boyd
2016-03-24 15:49 ` Matthew McClintock
2016-03-25 14:13 ` Rob Herring
2016-03-23 22:05 ` [PATCH 07/17] watchdog: qcom: add option for standalone watchdog not in timer block Matthew McClintock
2016-03-23 22:40 ` Stephen Boyd
2016-03-25 16:23 ` Guenter Roeck
2016-03-28 16:55 ` Matthew McClintock
2016-03-28 18:13 ` Guenter Roeck [this message]
2016-03-28 20:40 ` Matthew McClintock
2016-03-28 21:56 ` Guenter Roeck
2016-03-28 22:21 ` Matthew McClintock
2016-03-23 22:05 ` [PATCH 08/17] watchdog: qcom: configure BARK time in addition to BITE time Matthew McClintock
2016-03-23 22:42 ` Stephen Boyd
2016-03-24 15:46 ` Matthew McClintock
2016-03-24 16:17 ` Guenter Roeck
2016-03-24 19:49 ` Matthew McClintock
2016-04-07 7:02 ` Guenter Roeck
2016-03-23 22:05 ` [PATCH 09/17] watchdog: qcom: add kpss-standalone to device tree binding Matthew McClintock
2016-03-25 14:15 ` Rob Herring
2016-03-28 17:02 ` Matthew McClintock
2016-03-28 17:26 ` Rob Herring
2016-03-28 18:15 ` Guenter Roeck
2016-03-28 22:22 ` Matthew McClintock
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