From: Rex-BC Chen <rex-bc.chen@mediatek.com>
To: <wim@linux-watchdog.org>, <linux@roeck-us.net>,
<matthias.bgg@gmail.com>, <robh+dt@kernel.org>,
<p.zabel@pengutronix.de>
Cc: <runyang.chen@mediatek.com>, <linux-watchdog@vger.kernel.org>,
<devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
<linux-kernel@vger.kernel.org>,
<Project_Global_Chrome_Upstream_Group@mediatek.com>,
Rex-BC Chen <rex-bc.chen@mediatek.com>
Subject: [RESEND V2 2/3] dt-bindings: reset: mt8186: add reset-controller header file
Date: Tue, 1 Mar 2022 13:44:04 +0800 [thread overview]
Message-ID: <20220301054405.25021-3-rex-bc.chen@mediatek.com> (raw)
In-Reply-To: <20220301054405.25021-1-rex-bc.chen@mediatek.com>
From: Runyang Chen <runyang.chen@mediatek.com>
- Add toprgu reset-controller header file for MT8186.
- Add DSI software reset bit which is controlled in MMSYS for MT8186.
Signed-off-by: Runyang Chen <runyang.chen@mediatek.com>
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
---
include/dt-bindings/reset/mt8186-resets.h | 36 +++++++++++++++++++++++
1 file changed, 36 insertions(+)
create mode 100644 include/dt-bindings/reset/mt8186-resets.h
diff --git a/include/dt-bindings/reset/mt8186-resets.h b/include/dt-bindings/reset/mt8186-resets.h
new file mode 100644
index 000000000000..5f850370c42c
--- /dev/null
+++ b/include/dt-bindings/reset/mt8186-resets.h
@@ -0,0 +1,36 @@
+/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
+/*
+ * Copyright (c) 2022 MediaTek Inc.
+ * Author: Runyang Chen <runyang.chen@mediatek.com>
+ */
+
+#ifndef _DT_BINDINGS_RESET_CONTROLLER_MT8186
+#define _DT_BINDINGS_RESET_CONTROLLER_MT8186
+
+#define MT8186_TOPRGU_INFRA_SW_RST 0
+#define MT8186_TOPRGU_MM_SW_RST 1
+#define MT8186_TOPRGU_MFG_SW_RST 2
+#define MT8186_TOPRGU_VENC_SW_RST 3
+#define MT8186_TOPRGU_VDEC_SW_RST 4
+#define MT8186_TOPRGU_IMG_SW_RST 5
+#define MT8186_TOPRGU_DDR_SW_RST 6
+#define MT8186_TOPRGU_INFRA_AO_SW_RST 8
+#define MT8186_TOPRGU_CONNSYS_SW_RST 9
+#define MT8186_TOPRGU_APMIXED_SW_RST 10
+#define MT8186_TOPRGU_PWRAP_SW_RST 11
+#define MT8186_TOPRGU_CONN_MCU_SW_RST 12
+#define MT8186_TOPRGU_IPNNA_SW_RST 13
+#define MT8186_TOPRGU_WPE_SW_RST 14
+#define MT8186_TOPRGU_ADSP_SW_RST 15
+#define MT8186_TOPRGU_AUDIO_SW_RST 17
+#define MT8186_TOPRGU_CAM_MAIN_SW_RST 18
+#define MT8186_TOPRGU_CAM_RAWA_SW_RST 19
+#define MT8186_TOPRGU_CAM_RAWB_SW_RST 20
+#define MT8186_TOPRGU_IPE_SW_RST 21
+#define MT8186_TOPRGU_IMG2_SW_RST 22
+#define MT8186_TOPRGU_SW_RST_NUM 23
+
+/* MMSYS resets */
+#define MT8186_MMSYS_SW0_RST_B_DISP_DSI0 19
+
+#endif /* _DT_BINDINGS_RESET_CONTROLLER_MT8186 */
--
2.18.0
next prev parent reply other threads:[~2022-03-01 5:44 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-01 5:44 [RESEND V2 0/3] Add watchdog support for MT8186 SoC Rex-BC Chen
2022-03-01 5:44 ` [RESEND V2 1/3] dt-bindings: watchdog: Add compatible for MediaTek MT8186 Rex-BC Chen
2022-03-01 5:44 ` Rex-BC Chen [this message]
2022-03-01 5:44 ` [RESEND V2 3/3] watchdog: mediatek: mt8186: add wdt support Rex-BC Chen
2022-03-10 8:34 ` [RESEND V2 0/3] Add watchdog support for MT8186 SoC Rex-BC Chen
2022-03-10 9:15 ` Rex-BC Chen
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