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([2600:1700:e321:62f0:329c:23ff:fee3:9d7c]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2c99a992c43sm5433810a91.30.2024.07.06.12.47.42 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 06 Jul 2024 12:47:42 -0700 (PDT) Sender: Guenter Roeck Message-ID: <9770a65c-e08a-4f7c-9ffd-8899d8390e2e@roeck-us.net> Date: Sat, 6 Jul 2024 12:47:41 -0700 Precedence: bulk X-Mailing-List: linux-watchdog@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 4/4] watchdog: it87_wdt: Keep WDTCTRL bit 3 unmodified for IT8784/IT8786 To: James Hilliard , Werner Fischer Cc: Wim Van Sebroeck , linux-watchdog@vger.kernel.org References: <20231213094525.11849-1-devlists@wefi.net> <20231213094525.11849-4-devlists@wefi.net> Content-Language: en-US From: Guenter Roeck Autocrypt: addr=linux@roeck-us.net; keydata= xsFNBE6H1WcBEACu6jIcw5kZ5dGeJ7E7B2uweQR/4FGxH10/H1O1+ApmcQ9i87XdZQiB9cpN RYHA7RCEK2dh6dDccykQk3bC90xXMPg+O3R+C/SkwcnUak1UZaeK/SwQbq/t0tkMzYDRxfJ7 nyFiKxUehbNF3r9qlJgPqONwX5vJy4/GvDHdddSCxV41P/ejsZ8PykxyJs98UWhF54tGRWFl 7i1xvaDB9lN5WTLRKSO7wICuLiSz5WZHXMkyF4d+/O5ll7yz/o/JxK5vO/sduYDIlFTvBZDh gzaEtNf5tQjsjG4io8E0Yq0ViobLkS2RTNZT8ICq/Jmvl0SpbHRvYwa2DhNsK0YjHFQBB0FX IdhdUEzNefcNcYvqigJpdICoP2e4yJSyflHFO4dr0OrdnGLe1Zi/8Xo/2+M1dSSEt196rXaC kwu2KgIgmkRBb3cp2vIBBIIowU8W3qC1+w+RdMUrZxKGWJ3juwcgveJlzMpMZNyM1jobSXZ0 VHGMNJ3MwXlrEFPXaYJgibcg6brM6wGfX/LBvc/haWw4yO24lT5eitm4UBdIy9pKkKmHHh7s jfZJkB5fWKVdoCv/omy6UyH6ykLOPFugl+hVL2Prf8xrXuZe1CMS7ID9Lc8FaL1ROIN/W8Vk BIsJMaWOhks//7d92Uf3EArDlDShwR2+D+AMon8NULuLBHiEUQARAQABzTJHdWVudGVyIFJv ZWNrIChMaW51eCBhY2NvdW50KSA8bGludXhAcm9lY2stdXMubmV0PsLBgQQTAQIAKwIbAwYL CQgHAwIGFQgCCQoLBBYCAwECHgECF4ACGQEFAlVcphcFCRmg06EACgkQyx8mb86fmYFg0RAA nzXJzuPkLJaOmSIzPAqqnutACchT/meCOgMEpS5oLf6xn5ySZkl23OxuhpMZTVX+49c9pvBx hpvl5bCWFu5qC1jC2eWRYU+aZZE4sxMaAGeWenQJsiG9lP8wkfCJP3ockNu0ZXXAXwIbY1O1 c+l11zQkZw89zNgWgKobKzrDMBFOYtAh0pAInZ9TSn7oA4Ctejouo5wUugmk8MrDtUVXmEA9 7f9fgKYSwl/H7dfKKsS1bDOpyJlqhEAH94BHJdK/b1tzwJCFAXFhMlmlbYEk8kWjcxQgDWMu GAthQzSuAyhqyZwFcOlMCNbAcTSQawSo3B9yM9mHJne5RrAbVz4TWLnEaX8gA5xK3uCNCeyI sqYuzA4OzcMwnnTASvzsGZoYHTFP3DQwf2nzxD6yBGCfwNGIYfS0i8YN8XcBgEcDFMWpOQhT Pu3HeztMnF3HXrc0t7e5rDW9zCh3k2PA6D2NV4fews9KDFhLlTfCVzf0PS1dRVVWM+4jVl6l HRIAgWp+2/f8dx5vPc4Ycp4IsZN0l1h9uT7qm1KTwz+sSl1zOqKD/BpfGNZfLRRxrXthvvY8 BltcuZ4+PGFTcRkMytUbMDFMF9Cjd2W9dXD35PEtvj8wnEyzIos8bbgtLrGTv/SYhmPpahJA l8hPhYvmAvpOmusUUyB30StsHIU2LLccUPPOwU0ETofVZwEQALlLbQeBDTDbwQYrj0gbx3bq 7kpKABxN2MqeuqGr02DpS9883d/t7ontxasXoEz2GTioevvRmllJlPQERVxM8gQoNg22twF7 pB/zsrIjxkE9heE4wYfN1AyzT+AxgYN6f8hVQ7Nrc9XgZZe+8IkuW/Nf64KzNJXnSH4u6nJM J2+Dt274YoFcXR1nG76Q259mKwzbCukKbd6piL+VsT/qBrLhZe9Ivbjq5WMdkQKnP7gYKCAi pNVJC4enWfivZsYupMd9qn7Uv/oCZDYoBTdMSBUblaLMwlcjnPpOYK5rfHvC4opxl+P/Vzyz 6WC2TLkPtKvYvXmdsI6rnEI4Uucg0Au/Ulg7aqqKhzGPIbVaL+U0Wk82nz6hz+WP2ggTrY1w ZlPlRt8WM9w6WfLf2j+PuGklj37m+KvaOEfLsF1v464dSpy1tQVHhhp8LFTxh/6RWkRIR2uF I4v3Xu/k5D0LhaZHpQ4C+xKsQxpTGuYh2tnRaRL14YMW1dlI3HfeB2gj7Yc8XdHh9vkpPyuT nY/ZsFbnvBtiw7GchKKri2gDhRb2QNNDyBnQn5mRFw7CyuFclAksOdV/sdpQnYlYcRQWOUGY HhQ5eqTRZjm9z+qQe/T0HQpmiPTqQcIaG/edgKVTUjITfA7AJMKLQHgp04Vylb+G6jocnQQX JqvvP09whbqrABEBAAHCwWUEGAECAA8CGwwFAlVcpi8FCRmg08MACgkQyx8mb86fmYHNRQ/+ J0OZsBYP4leJvQF8lx9zif+v4ZY/6C9tTcUv/KNAE5leyrD4IKbnV4PnbrVhjq861it/zRQW cFpWQszZyWRwNPWUUz7ejmm9lAwPbr8xWT4qMSA43VKQ7ZCeTQJ4TC8kjqtcbw41SjkjrcTG wF52zFO4bOWyovVAPncvV9eGA/vtnd3xEZXQiSt91kBSqK28yjxAqK/c3G6i7IX2rg6pzgqh hiH3/1qM2M/LSuqAv0Rwrt/k+pZXE+B4Ud42hwmMr0TfhNxG+X7YKvjKC+SjPjqp0CaztQ0H nsDLSLElVROxCd9m8CAUuHplgmR3seYCOrT4jriMFBtKNPtj2EE4DNV4s7k0Zy+6iRQ8G8ng QjsSqYJx8iAR8JRB7Gm2rQOMv8lSRdjva++GT0VLXtHULdlzg8VjDnFZ3lfz5PWEOeIMk7Rj trjv82EZtrhLuLjHRCaG50OOm0hwPSk1J64R8O3HjSLdertmw7eyAYOo4RuWJguYMg5DRnBk WkRwrSuCn7UG+qVWZeKEsFKFOkynOs3pVbcbq1pxbhk3TRWCGRU5JolI4ohy/7JV1TVbjiDI HP/aVnm6NC8of26P40Pg8EdAhajZnHHjA7FrJXsy3cyIGqvg9os4rNkUWmrCfLLsZDHD8FnU mDW4+i+XlNFUPUYMrIKi9joBhu18ssf5i5Q= In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 7/6/24 12:06, James Hilliard wrote: > On Wed, Dec 13, 2023 at 1:45 AM Werner Fischer wrote: >> >> WDTCTRL bit 3 sets the mode choice for the clock input of IT8784/IT8786. >> Some motherboards require this bit to be set to 1 (= PCICLK mode), >> otherwise the watchdog functionality gets broken. The BIOS of those >> motherboards sets WDTCTRL bit 3 already to 1. >> >> Instead of setting all bits of WDTCTRL to 0 by writing 0x00 to it, keep >> bit 3 of it unchanged for IT8784/IT8786 chips. In this way, bit 3 keeps >> the status as set by the BIOS of the motherboard. > > I have a board(https://qotom.net/product/94.html) with an IT8786 > revision 4 which is recognized but doesn't seem to ever trigger. Did > your IT8786 based boards show revision 4 like mine do? > > [ 1.607590] it87_wdt: Chip IT8786 revision 4 initialized. > timeout=60 sec (nowayout=0 testmode=0) > [ 2.367608] systemd[1]: Using hardware watchdog 'IT87 WDT', version > 1, device /dev/watchdog0 > > Docs I have from the vendor just show bit 3 as reserved: > > https://qotom.us/download/SuperIO/IT8786_B_V0.2_industrial_111412.pdf > > 8.10.8 Watch Dog Timer Control Register (Index=71h, Default=00h) > > Bit Description > 7 WDT is reset upon a CIR interrupt. > 6 WDT is reset upon a KBC(Mouse) interrupt. > 5 WDT is reset upon a KBC(Keyboard) interrupt. > 4 WDT Status will not be cleared by VCCOK or LRESET#, and only > be cleared while write one to WDT Status > 1: Enable > 0: Disable > 3-2 Reserved > 1 Force Time-out > This bit is self-cleared. > 0 WDT Status > 1: WDT value is equal to 0. > 0: WDT value is not is equal to 0. > > Any idea why the docs I have would just show bit 3 as reserved? > > Did you have any information from your vendor under what conditions > bit 3 should be set? > On ITE8784E bit 3 is "External CLK_IN Select". >> >> Watchdog tests have been successful with this patch with the following >> systems: >> IT8784: Thomas-Krenn LES plus v2 (YANLING YL-KBRL2 V2) >> IT8786: Thomas-Krenn LES plus v3 (YANLING YL-CLU L2) >> IT8786: Thomas-Krenn LES network 6L v2 (YANLING YL-CLU6L) >> >> Link: https://lore.kernel.org/all/140b264d-341f-465b-8715-dacfe84b3f71@roeck-us.net/ >> >> Signed-off-by: Werner Fischer >> --- >> drivers/watchdog/it87_wdt.c | 14 +++++++++++++- >> 1 file changed, 13 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/watchdog/it87_wdt.c b/drivers/watchdog/it87_wdt.c >> index f6a344c002af..9297a5891912 100644 >> --- a/drivers/watchdog/it87_wdt.c >> +++ b/drivers/watchdog/it87_wdt.c >> @@ -258,6 +258,7 @@ static struct watchdog_device wdt_dev = { >> static int __init it87_wdt_init(void) >> { >> u8 chip_rev; >> + u8 ctrl; >> int rc; >> >> rc = superio_enter(); >> @@ -316,7 +317,18 @@ static int __init it87_wdt_init(void) >> >> superio_select(GPIO); >> superio_outb(WDT_TOV1, WDTCFG); >> - superio_outb(0x00, WDTCTRL); >> + >> + switch (chip_type) { >> + case IT8784_ID: >> + case IT8786_ID: >> + ctrl = superio_inb(WDTCTRL); > > If I print this value out like this: > pr_warn("WDTCTRL initial: %02x\n", ctrl); > > I get 0x00: > [ 1.607480] it87_wdt: WDTCTRL initial: 00 > > Do you think it's required that the kernel set bit 3 for some boards for > the watchdog to work correctly if not set by the BIOS? > That is done for none of the boards. The code in question does not _clear_ the bit, but it is never set. > Or maybe it's required to configure additional registers? > I would suspect that to be the case. You might want to check register 0x72. Guenter