From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 61360CCA482 for ; Wed, 29 Jun 2022 16:40:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229704AbiF2QkM (ORCPT ); Wed, 29 Jun 2022 12:40:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50314 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229479AbiF2QkL (ORCPT ); Wed, 29 Jun 2022 12:40:11 -0400 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 644292C11C; Wed, 29 Jun 2022 09:40:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1656520810; x=1688056810; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=Z+hcQzKepqpV4YWC94+CLnyEkG6YeuxWItwkjNGgn3g=; b=EMRW4yYMOut+YvJiCcEB/BGuUvjzqEzgX9f5bC9NWVMYs6cnTWIe3WsI T6YkypOYsWZ/OLVPV8f5g5zspOYHdmoP7AINP4P2SWAuBeX2ygDN3vXoZ rUGXuRCQrR6WL24VKXhV+NoEMuybUALfGA9WSeuKPfdK4lUMKvnG5Mjc/ 7uBpK0Suq3innGLuCCU6bTB+dGOTuBMIsRf/cLA2YeNnZXtTV6o+8No4x RdLkwQCfTfTGQgNsO7dvOjRqGRW4166hFId7Rb5M1/B9NZgiacPTvslkK WyBaqJMNOYz3BNdwJcH1z3//EMNFHQ2qQXwO08sgRMqCYfRqFGAIMvosh g==; X-IronPort-AV: E=McAfee;i="6400,9594,10393"; a="307579352" X-IronPort-AV: E=Sophos;i="5.92,231,1650956400"; d="scan'208";a="307579352" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Jun 2022 09:40:09 -0700 X-IronPort-AV: E=Sophos;i="5.92,231,1650956400"; d="scan'208";a="617628857" Received: from smile.fi.intel.com ([10.237.72.54]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Jun 2022 09:40:02 -0700 Received: from andy by smile.fi.intel.com with local (Exim 4.95) (envelope-from ) id 1o6ajO-000xuI-Nk; Wed, 29 Jun 2022 19:39:58 +0300 Date: Wed, 29 Jun 2022 19:39:58 +0300 From: Andy Shevchenko To: Lee Jones , "Rafael J. Wysocki" Cc: Tony Luck , Wolfram Sang , Jean Delvare , Heiner Kallweit , Henning Schild , Mika Westerberg , Hans de Goede , Linus Walleij , Jonathan Yong , Guenter Roeck , Wim Van Sebroeck , Linux Kernel Mailing List , linux-edac@vger.kernel.org, linux-i2c , Linux LED Subsystem , "open list:GPIO SUBSYSTEM" , Platform Driver , LINUXWATCHDOG , Borislav Petkov , Mauro Carvalho Chehab , James Morse , Robert Richter , Jean Delvare , Pavel Machek , Peter Tyser , Andy Shevchenko , Mark Gross Subject: Re: [PATCH v6 00/12] platform/x86: introduce p2sb_bar() helper Message-ID: References: <20220606164138.66535-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org +Cc: Rafael On Tue, Jun 21, 2022 at 02:58:16PM +0300, Andy Shevchenko wrote: > On Wed, Jun 08, 2022 at 12:50:44PM +0200, Andy Shevchenko wrote: > > On Wed, Jun 8, 2022 at 9:42 AM Lee Jones wrote: > > > On Mon, 06 Jun 2022, Andy Shevchenko wrote: > > > > > > > There are a few users that would like to utilize P2SB mechanism of hiding > > > > and unhiding a device from the PCI configuration space. > > > > > > > > Here is the series to consolidate p2sb handling code for existing users > > > > and to provide a generic way for new comer(s). > > > > > > > > It also includes a patch to enable GPIO controllers on Apollo Lake > > > > when it's used with ABL bootloader w/o ACPI support. > > > > > > > > The patch that brings the helper ("platform/x86/intel: Add Primary to > > > > Sideband (P2SB) bridge support") has a commit message that sheds a light > > > > on what the P2SB is and why this is needed. > > > > > > > > I have tested this on Apollo Lake platform (I'm able to see SPI NOR and > > > > since we have an ACPI device for GPIO I do not see any attempts to recreate > > > > one). > > > > > > > > The series is ready to be merged via MFD tree, but see below. > > > > > > > > The series also includes updates for Simatic IPC drivers that partially > > > > tagged by respective maintainers (the main question is if Pavel is okay > > > > with the last three patches, since I believe Hans is okay with removing > > > > some code under PDx86). Hence the first 8 patches can be merged right > > > > away and the rest when Pavel does his review. > > > > > > Can we just wait for Pavel's review, then merge them all at once? > > > > Sure, it would be the best course of action. > > Pavel, do you have a chance to review the patches (last three) that touch > LED drivers? What would be your verdict? Lee, Rafael, It seems quite hard to get Pavel's attention to this series [1]. It's already passed more than 3 weeks for any sign of review of three top patches of the series that touched LED subsystem. The entire series has all necessary tags, but for LED changes. Note, that the top of this series is not done by me and was sent for preliminary review much earlier [2], altogether it makes months of no response from the maintainer. The nature of patches is pretty simple and doesn't touch any of other than Simatic LED drivers nor LED core. Moreover, it was written by Siemens, who produces the H/W in question and very well tested as a separate change and as part of the series. I think to move forward we may ask Rafael to review it on behalf of good maintainer and with his approval apply entire series. Thoughts? [1]: https://lore.kernel.org/all/20220606164138.66535-1-andriy.shevchenko@linux.intel.com/ [2]: https://lore.kernel.org/linux-leds/20220513083652.974-1-henning.schild@siemens.com/ -- With Best Regards, Andy Shevchenko