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([2600:1700:e321:62f0:329c:23ff:fee3:9d7c]) by smtp.gmail.com with ESMTPSA id px6-20020a17090b270600b002609cadc56esm9605497pjb.11.2023.12.12.13.18.59 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 12 Dec 2023 13:19:01 -0800 (PST) Sender: Guenter Roeck Message-ID: Date: Tue, 12 Dec 2023 13:18:59 -0800 Precedence: bulk X-Mailing-List: linux-watchdog@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v7 12/16] watchdog: s3c2410_wdt: Add support for Google gs101 SoC Content-Language: en-US To: Peter Griffin , robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, mturquette@baylibre.com, conor+dt@kernel.org, sboyd@kernel.org, tomasz.figa@gmail.com, s.nawrocki@samsung.com, linus.walleij@linaro.org, wim@linux-watchdog.org, catalin.marinas@arm.com, will@kernel.org, arnd@arndb.de, olof@lixom.net, gregkh@linuxfoundation.org, jirislaby@kernel.org, cw00.choi@samsung.com, alim.akhtar@samsung.com Cc: tudor.ambarus@linaro.org, andre.draszik@linaro.org, semen.protsenko@linaro.org, saravanak@google.com, willmcvicker@google.com, soc@kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, linux-watchdog@vger.kernel.org, kernel-team@android.com, linux-serial@vger.kernel.org References: <20231211162331.435900-1-peter.griffin@linaro.org> <20231211162331.435900-13-peter.griffin@linaro.org> From: Guenter Roeck Autocrypt: addr=linux@roeck-us.net; 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charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 12/11/23 08:23, Peter Griffin wrote: > This patch adds the compatibles and drvdata for the Google > gs101 SoC found in Pixel 6, Pixel 6a & Pixel 6 pro phones. > > Similar to Exynos850 it has two watchdog instances, one for > each cluster and has some control bits in PMU registers. > > gs101 also has the dbgack_mask bit in wtcon register, so > we also enable QUIRK_HAS_DBGACK_BIT. > > Tested-by: Will McVicker > Reviewed-by: Sam Protsenko > Signed-off-by: Peter Griffin Reviewed-by: Guenter Roeck > --- > drivers/watchdog/s3c2410_wdt.c | 49 ++++++++++++++++++++++++++++++---- > 1 file changed, 44 insertions(+), 5 deletions(-) > > diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c > index b7a03668f743..c3046610ab5d 100644 > --- a/drivers/watchdog/s3c2410_wdt.c > +++ b/drivers/watchdog/s3c2410_wdt.c > @@ -69,6 +69,13 @@ > #define EXYNOSAUTOV9_CLUSTER0_WDTRESET_BIT 25 > #define EXYNOSAUTOV9_CLUSTER1_WDTRESET_BIT 24 > > +#define GS_CLUSTER0_NONCPU_OUT 0x1220 > +#define GS_CLUSTER1_NONCPU_OUT 0x1420 > +#define GS_CLUSTER0_NONCPU_INT_EN 0x1244 > +#define GS_CLUSTER1_NONCPU_INT_EN 0x1444 > +#define GS_CLUSTER2_NONCPU_INT_EN 0x1644 > +#define GS_RST_STAT_REG_OFFSET 0x3B44 > + > /** > * DOC: Quirk flags for different Samsung watchdog IP-cores > * > @@ -270,7 +277,35 @@ static const struct s3c2410_wdt_variant drv_data_exynosautov9_cl1 = { > QUIRK_HAS_PMU_RST_STAT | QUIRK_HAS_PMU_CNT_EN, > }; > > +static const struct s3c2410_wdt_variant drv_data_gs101_cl0 = { > + .mask_reset_reg = GS_CLUSTER0_NONCPU_INT_EN, > + .mask_bit = 2, > + .mask_reset_inv = true, > + .rst_stat_reg = GS_RST_STAT_REG_OFFSET, > + .rst_stat_bit = 0, > + .cnt_en_reg = GS_CLUSTER0_NONCPU_OUT, > + .cnt_en_bit = 8, > + .quirks = QUIRK_HAS_PMU_RST_STAT | QUIRK_HAS_PMU_MASK_RESET | > + QUIRK_HAS_PMU_CNT_EN | QUIRK_HAS_WTCLRINT_REG | > + QUIRK_HAS_DBGACK_BIT, > +}; > + > +static const struct s3c2410_wdt_variant drv_data_gs101_cl1 = { > + .mask_reset_reg = GS_CLUSTER1_NONCPU_INT_EN, > + .mask_bit = 2, > + .mask_reset_inv = true, > + .rst_stat_reg = GS_RST_STAT_REG_OFFSET, > + .rst_stat_bit = 1, > + .cnt_en_reg = GS_CLUSTER1_NONCPU_OUT, > + .cnt_en_bit = 7, > + .quirks = QUIRK_HAS_PMU_RST_STAT | QUIRK_HAS_PMU_MASK_RESET | > + QUIRK_HAS_PMU_CNT_EN | QUIRK_HAS_WTCLRINT_REG | > + QUIRK_HAS_DBGACK_BIT, > +}; > + > static const struct of_device_id s3c2410_wdt_match[] = { > + { .compatible = "google,gs101-wdt", > + .data = &drv_data_gs101_cl0 }, > { .compatible = "samsung,s3c2410-wdt", > .data = &drv_data_s3c2410 }, > { .compatible = "samsung,s3c6410-wdt", > @@ -605,9 +640,10 @@ s3c2410_get_wdt_drv_data(struct platform_device *pdev, struct s3c2410_wdt *wdt) > } > > #ifdef CONFIG_OF > - /* Choose Exynos850/ExynosAutov9 driver data w.r.t. cluster index */ > + /* Choose Exynos9 SoC family driver data w.r.t. cluster index */ > if (variant == &drv_data_exynos850_cl0 || > - variant == &drv_data_exynosautov9_cl0) { > + variant == &drv_data_exynosautov9_cl0 || > + variant == &drv_data_gs101_cl0) { > u32 index; > int err; > > @@ -620,9 +656,12 @@ s3c2410_get_wdt_drv_data(struct platform_device *pdev, struct s3c2410_wdt *wdt) > case 0: > break; > case 1: > - variant = (variant == &drv_data_exynos850_cl0) ? > - &drv_data_exynos850_cl1 : > - &drv_data_exynosautov9_cl1; > + if (variant == &drv_data_exynos850_cl0) > + variant = &drv_data_exynos850_cl1; > + else if (variant == &drv_data_exynosautov9_cl0) > + variant = &drv_data_exynosautov9_cl1; > + else if (variant == &drv_data_gs101_cl0) > + variant = &drv_data_gs101_cl1; > break; > default: > return dev_err_probe(dev, -EINVAL, "wrong cluster index: %u\n", index);