From: sashiko-bot@kernel.org
To: "Rong Zhang" <rongrong@oss.cipunited.com>
Cc: linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org,
robh@kernel.org, conor+dt@kernel.org
Subject: Re: [PATCH v2 3/8] MIPS: Loongson64: dts: ls7a-pch: Add missing #address-cells to interrupt controllers
Date: Fri, 13 Nov 2026 11:01:51 +0000 [thread overview]
Message-ID: <sashiko-outbox-212658@kernel.org> (raw)
In-Reply-To: <20261113-mips-ls7a-wdt-v2-3-e8abd6b2f77c@oss.cipunited.com>
Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [Low] MIPS: dts: loongson: invalid #address-cells on ls7a-lpc node
--
commit b3cb4b22fb7d7fa764f95bec26fd2bfb7137915e
Author: Rong Zhang <rongrong@oss.cipunited.com>
MIPS: Loongson64: dts: ls7a-pch: Add missing #address-cells to interrupt controllers
This commit adds #address-cells = <0> properties to the pic and lpc
interrupt-controller nodes in ls7a-pch.dtsi.
> diff --git a/arch/mips/boot/dts/loongson/ls7a-pch.dtsi b/arch/mips/boot/dts/loongson/ls7a-pch.dtsi
> index f304f99946f16..28038b8cdd146 100644
> --- a/arch/mips/boot/dts/loongson/ls7a-pch.dtsi
> +++ b/arch/mips/boot/dts/loongson/ls7a-pch.dtsi
[ ... ]
> @@ -26,6 +27,7 @@ lpc: interrupt-controller@10002000 {
> interrupt-parent = <&pic>;
> interrupts = <19 IRQ_TYPE_LEVEL_HIGH>;
> #interrupt-cells = <2>;
> + #address-cells = <0>;
> };
>
> ls7a_uart0: serial@10080000 {
[Severity: Low]
Does adding #address-cells to the lpc node break dtbs_check schema
validation?
Documentation/devicetree/bindings/interrupt-controller/loongson,pch-lpc.yaml
sets additionalProperties: false and does not define #address-cells.
Unlike pic, lpc is not referenced by any interrupt-map property, so dtc's
check_interrupt_map() does not warn about it.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261113-mips-ls7a-wdt-v2-0-e8abd6b2f77c@oss.cipunited.com?part=3
next prev parent reply other threads:[~2026-11-13 11:01 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-13 10:51 [PATCH v2 0/8] watchdog: loongson1: Add Loongson-7A watchdog support Rong Zhang
2026-11-13 10:51 ` [PATCH v2 1/8] dt-bindings: watchdog: loongson,ls1x-wdt: Add compatible for Loongson-7A Rong Zhang
2026-11-13 10:51 ` [PATCH v2 2/8] MIPS: Loongson64: env: Don't warn if UART has clocks node when fixing up FDT Rong Zhang
2026-11-13 10:51 ` [PATCH v2 3/8] MIPS: Loongson64: dts: ls7a-pch: Add missing #address-cells to interrupt controllers Rong Zhang
2026-11-13 11:01 ` sashiko-bot [this message]
2026-11-13 10:51 ` [PATCH v2 4/8] MIPS: Loongson64: dts: ls7a-pch: Use hex in ranges and reg properties Rong Zhang
2026-11-13 10:51 ` [PATCH v2 5/8] MIPS: Loongson64: dts: ls7a-pch: Add miscellaneous clock node Rong Zhang
2026-11-13 10:51 ` [PATCH v2 6/8] MIPS: Loongson64: dts: ls7a-pch: Bind UART nodes to miscellaneous clock Rong Zhang
2026-11-13 10:51 ` [PATCH v2 7/8] MIPS: Loongson64: dts: ls7a-pch: Add watchdog node Rong Zhang
2026-11-13 10:51 ` [PATCH v2 8/8] MIPS: loongson3_defconfig: Enable LOONGSON1_WDT by default Rong Zhang
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