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From: Vasanthakumar Thiagarajan <vasanth@atheros.com>
To: <linville@tuxdriver.com>
Cc: <linux-wireless@vger.kernel.org>
Subject: [PATCH 06/11] ath9k_hw: Fix XPABIAS level configuration for AR9003
Date: Wed, 10 Nov 2010 05:03:11 -0800	[thread overview]
Message-ID: <1289394196-3465-6-git-send-email-vasanth@atheros.com> (raw)
In-Reply-To: <1289394196-3465-1-git-send-email-vasanth@atheros.com>

Improper configuration of 0x16288 and 0x16290 would affect transmission.

Cc:stable@kernel.org
Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
---
 drivers/net/wireless/ath/ath9k/ar9003_eeprom.c |   14 ++++++++------
 1 files changed, 8 insertions(+), 6 deletions(-)

diff --git a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
index 3d467fc..17f73e4 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
@@ -22,12 +22,14 @@
 #define COMP_CKSUM_LEN 2
 
 #define AR_CH0_TOP (0x00016288)
-#define AR_CH0_TOP_XPABIASLVL (0x3)
+#define AR_CH0_TOP_XPABIASLVL (0x300)
 #define AR_CH0_TOP_XPABIASLVL_S (8)
 
 #define AR_CH0_THERM (0x00016290)
-#define AR_CH0_THERM_SPARE (0x3f)
-#define AR_CH0_THERM_SPARE_S (0)
+#define AR_CH0_THERM_XPABIASLVL_MSB 0x3
+#define AR_CH0_THERM_XPABIASLVL_MSB_S 0
+#define AR_CH0_THERM_XPASHORT2GND 0x4
+#define AR_CH0_THERM_XPASHORT2GND_S 2
 
 #define AR_SWITCH_TABLE_COM_ALL (0xffff)
 #define AR_SWITCH_TABLE_COM_ALL_S (0)
@@ -3336,9 +3338,9 @@ static s32 ar9003_hw_xpa_bias_level_get(struct ath_hw *ah, bool is2ghz)
 static void ar9003_hw_xpa_bias_level_apply(struct ath_hw *ah, bool is2ghz)
 {
 	int bias = ar9003_hw_xpa_bias_level_get(ah, is2ghz);
-	REG_RMW_FIELD(ah, AR_CH0_TOP, AR_CH0_TOP_XPABIASLVL, (bias & 0x3));
-	REG_RMW_FIELD(ah, AR_CH0_THERM, AR_CH0_THERM_SPARE,
-		      ((bias >> 2) & 0x3));
+	REG_RMW_FIELD(ah, AR_CH0_TOP, AR_CH0_TOP_XPABIASLVL, bias);
+	REG_RMW_FIELD(ah, AR_CH0_THERM, AR_CH0_THERM_XPABIASLVL_MSB, bias >> 2);
+	REG_RMW_FIELD(ah, AR_CH0_THERM, AR_CH0_THERM_XPASHORT2GND, 1);
 }
 
 static u32 ar9003_hw_ant_ctrl_common_get(struct ath_hw *ah, bool is2ghz)
-- 
1.7.0.4


  parent reply	other threads:[~2010-11-10 13:03 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-11-10 13:03 [PATCH 01/11] ath9k_hw: Fix a reset failure on AR9382 (2x2) Vasanthakumar Thiagarajan
2010-11-10 13:03 ` [PATCH 02/11] ath9k_hw: Add new member into the eeprom structure Vasanthakumar Thiagarajan
2010-11-10 13:03 ` [PATCH 03/11] ath9k_hw: Initialize 2GHz CTL properly Vasanthakumar Thiagarajan
2010-11-10 13:03 ` [PATCH 04/11] ath9k_hw: Fix paprd training frame failure Vasanthakumar Thiagarajan
2010-11-10 13:03 ` [PATCH 05/11] ath9k_hw: add eeprom templates for ar9003 family chipsets Vasanthakumar Thiagarajan
2010-11-10 13:03 ` Vasanthakumar Thiagarajan [this message]
2010-11-10 13:03 ` [PATCH 07/11] ath9k_hw: Enable strong signal detection for AR9003 Vasanthakumar Thiagarajan
2010-11-10 13:03 ` [PATCH 08/11] ath9k_hw: Improve power control accuracy " Vasanthakumar Thiagarajan
2010-11-10 13:03 ` [PATCH 09/11] ath9k_hw: Add helper function for interpolation Vasanthakumar Thiagarajan
2010-11-10 13:03 ` [PATCH 10/11] ath9k: Fix bug in delimiter padding computation Vasanthakumar Thiagarajan
2010-11-10 13:03 ` [PATCH 11/11] ath9k_hw: Fix low throughput issue with AR93xx Vasanthakumar Thiagarajan
2010-11-10 16:23 ` [PATCH 01/11] ath9k_hw: Fix a reset failure on AR9382 (2x2) Felix Fietkau

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