From: Vasanthakumar Thiagarajan <vasanth@atheros.com>
To: <linville@tuxdriver.com>
Cc: <linux-wireless@vger.kernel.org>
Subject: [PATCH 09/26] ath9k: Enable extended synch for AR9485 to fix L0s recovery issue
Date: Tue, 30 Nov 2010 23:32:38 -0800 [thread overview]
Message-ID: <1291188775-13707-10-git-send-email-vasanth@atheros.com> (raw)
In-Reply-To: <1291188775-13707-1-git-send-email-vasanth@atheros.com>
Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
---
drivers/net/wireless/ath/ath.h | 1 +
drivers/net/wireless/ath/ath9k/hw.c | 5 +++++
drivers/net/wireless/ath/ath9k/hw.h | 2 ++
drivers/net/wireless/ath/ath9k/main.c | 3 +++
drivers/net/wireless/ath/ath9k/pci.c | 12 ++++++++++++
5 files changed, 23 insertions(+), 0 deletions(-)
diff --git a/drivers/net/wireless/ath/ath.h b/drivers/net/wireless/ath/ath.h
index 26bdbee..f913db4 100644
--- a/drivers/net/wireless/ath/ath.h
+++ b/drivers/net/wireless/ath/ath.h
@@ -131,6 +131,7 @@ struct ath_bus_ops {
void (*read_cachesize)(struct ath_common *common, int *csz);
bool (*eeprom_read)(struct ath_common *common, u32 off, u16 *data);
void (*bt_coex_prep)(struct ath_common *common);
+ void (*extn_synch_en)(struct ath_common *common);
};
struct ath_common {
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index 513ae64..b1d3c1e 100644
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -1984,6 +1984,11 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah)
+ if (AR_SREV_9485_10(ah)) {
+ pCap->pcie_lcr_extsync_en = true;
+ pCap->pcie_lcr_offset = 0x80;
+ }
+
return 0;
}
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h
index bde1df3..1eb6a14 100644
--- a/drivers/net/wireless/ath/ath9k/hw.h
+++ b/drivers/net/wireless/ath/ath9k/hw.h
@@ -210,6 +210,8 @@ struct ath9k_hw_capabilities {
u8 rx_status_len;
u8 tx_desc_len;
u8 txs_len;
+ u16 pcie_lcr_offset;
+ bool pcie_lcr_extsync_en;
};
struct ath9k_ops_config {
diff --git a/drivers/net/wireless/ath/ath9k/main.c b/drivers/net/wireless/ath/ath9k/main.c
index f026a03..581dbd7 100644
--- a/drivers/net/wireless/ath/ath9k/main.c
+++ b/drivers/net/wireless/ath/ath9k/main.c
@@ -1188,6 +1188,9 @@ static int ath9k_start(struct ieee80211_hw *hw)
pm_qos_update_request(&sc->pm_qos_req, 55);
+ if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
+ common->bus_ops->extn_synch_en(common);
+
mutex_unlock:
mutex_unlock(&sc->mutex);
diff --git a/drivers/net/wireless/ath/ath9k/pci.c b/drivers/net/wireless/ath/ath9k/pci.c
index 09f69a9..c5a523d 100644
--- a/drivers/net/wireless/ath/ath9k/pci.c
+++ b/drivers/net/wireless/ath/ath9k/pci.c
@@ -104,11 +104,23 @@ static void ath_pci_bt_coex_prep(struct ath_common *common)
pci_write_config_byte(pdev, ATH_PCIE_CAP_LINK_CTRL, aspm);
}
+static void ath_pci_extn_synch_enable(struct ath_common *common)
+{
+ struct ath_softc *sc = (struct ath_softc *) common->priv;
+ struct pci_dev *pdev = to_pci_dev(sc->dev);
+ u8 lnkctl;
+
+ pci_read_config_byte(pdev, sc->sc_ah->caps.pcie_lcr_offset, &lnkctl);
+ lnkctl |= PCI_EXP_LNKCTL_ES;
+ pci_write_config_byte(pdev, sc->sc_ah->caps.pcie_lcr_offset, lnkctl);
+}
+
static const struct ath_bus_ops ath_pci_bus_ops = {
.ath_bus_type = ATH_PCI,
.read_cachesize = ath_pci_read_cachesize,
.eeprom_read = ath_pci_eeprom_read,
.bt_coex_prep = ath_pci_bt_coex_prep,
+ .extn_synch_en = ath_pci_extn_synch_enable,
};
static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
--
1.7.0.4
next prev parent reply other threads:[~2010-12-01 7:33 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-12-01 7:32 [PATCH 00/26] Add support for AR9485 Vasanthakumar Thiagarajan
2010-12-01 7:32 ` [PATCH 01/26] ath9k_hw: Define hw version macros " Vasanthakumar Thiagarajan
2010-12-01 7:32 ` [PATCH 02/26] ath9k_hw: Add initvals.h " Vasanthakumar Thiagarajan
2010-12-01 7:32 ` [PATCH 03/26] ath9k_hw: Enable hw initialization " Vasanthakumar Thiagarajan
2010-12-01 7:32 ` [PATCH 04/26] ath9k_hw: Initialize mode registers " Vasanthakumar Thiagarajan
2010-12-01 7:32 ` [PATCH 05/26] ath9k_hw: Initialize tx/rx gain table from initvals.h " Vasanthakumar Thiagarajan
2010-12-01 7:32 ` [PATCH 06/26] ath9k_hw: Eeeprom changes " Vasanthakumar Thiagarajan
2010-12-01 7:32 ` [PATCH 07/26] ath9k_hw: Disable LDPC " Vasanthakumar Thiagarajan
2010-12-01 7:32 ` [PATCH 08/26] ath9k: Disable TX STBC " Vasanthakumar Thiagarajan
2010-12-01 7:32 ` Vasanthakumar Thiagarajan [this message]
2010-12-01 7:32 ` [PATCH 10/26] ath9k: Configure pll control " Vasanthakumar Thiagarajan
2010-12-01 16:39 ` Felix Fietkau
2010-12-02 5:05 ` Vasanthakumar Thiagarajan
2010-12-02 5:09 ` Vasanthakumar Thiagarajan
2010-12-01 7:32 ` [PATCH 11/26] ath9k_hw: Find chansel of AR_PHY_65NM_CH0_SYNTH7 from an array " Vasanthakumar Thiagarajan
2010-12-01 16:45 ` Felix Fietkau
2010-12-02 5:43 ` Vasanthakumar Thiagarajan
2010-12-01 7:32 ` [PATCH 12/26] ath9k_hw: Add a helper function to get spur channel pointer from cal data for AR9003 family Vasanthakumar Thiagarajan
2010-12-01 7:32 ` [PATCH 13/26] ath9k: Read spur channel information from eeprom for AR9485 Vasanthakumar Thiagarajan
2010-12-01 7:32 ` [PATCH 14/26] ath9k_hw: Configure xpa bias level " Vasanthakumar Thiagarajan
2010-12-01 7:32 ` [PATCH 15/26] ath9k_hw: Read and configure antenna diversity control " Vasanthakumar Thiagarajan
2010-12-01 7:32 ` [PATCH 16/26] ath9k_hw: Configure attenuation control only for chain 0 on AR9485 Vasanthakumar Thiagarajan
2010-12-01 16:50 ` Felix Fietkau
2010-12-02 5:13 ` Vasanthakumar Thiagarajan
2010-12-01 7:32 ` [PATCH 17/26] ath9k_hw: Configure internal regulator for AR9485 Vasanthakumar Thiagarajan
2010-12-01 7:32 ` [PATCH 18/26] ath9k_hw: Read and configure turnning caps to regulate freq accuracy Vasanthakumar Thiagarajan
2010-12-01 7:32 ` [PATCH 19/26] ath9k_hw: Configure power control only for chain 0 on AR9485 Vasanthakumar Thiagarajan
2010-12-01 16:51 ` Felix Fietkau
2010-12-01 7:32 ` [PATCH 20/26] ath9k_hw: Program appropriate chianmask for AR9485 before starting AGC/IQ cal Vasanthakumar Thiagarajan
2010-12-01 7:32 ` [PATCH 21/26] ath9k_hw: Define IQcal correction coefficient registers using index Vasanthakumar Thiagarajan
2010-12-01 7:32 ` [PATCH 22/26] ath9k_hw: Add IQ cal changes for AR9485 Vasanthakumar Thiagarajan
2010-12-01 7:32 ` [PATCH 23/26] ath9k_hw: Program appropriate register for temperature compensation cal " Vasanthakumar Thiagarajan
2010-12-01 7:32 ` [PATCH 24/26] ath9k_hw: Setup paprd only for chain 0 on AR9485 Vasanthakumar Thiagarajan
2010-12-01 16:52 ` Felix Fietkau
2010-12-01 7:32 ` [PATCH 25/26] ath9k_hw: Disable MRC CCK for AR9485 Vasanthakumar Thiagarajan
2010-12-01 7:32 ` [PATCH 26/26] ath9k: Add device id of AR9485 to pci table Vasanthakumar Thiagarajan
2010-12-01 7:52 ` [PATCH 00/26] Add support for AR9485 Luis R. Rodriguez
2010-12-01 8:36 ` Vasanthakumar Thiagarajan
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1291188775-13707-10-git-send-email-vasanth@atheros.com \
--to=vasanth@atheros.com \
--cc=linux-wireless@vger.kernel.org \
--cc=linville@tuxdriver.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).