From: Vasanthakumar Thiagarajan <vasanth@atheros.com>
To: <linville@tuxdriver.com>
Cc: <linux-wireless@vger.kernel.org>
Subject: [PATCH V3 10/27] ath9k_hw: Find the maximum number of chains that hw supports
Date: Mon, 6 Dec 2010 04:27:43 -0800 [thread overview]
Message-ID: <1291638480-8950-11-git-send-email-vasanth@atheros.com> (raw)
In-Reply-To: <1291638480-8950-1-git-send-email-vasanth@atheros.com>
Have it in ah->caps. This will be used during various
calibrations.
Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
---
drivers/net/wireless/ath/ath9k/hw.c | 14 +++++++++++++-
drivers/net/wireless/ath/ath9k/hw.h | 2 ++
2 files changed, 15 insertions(+), 1 deletions(-)
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index b1d3c1e..ddbd6fb 100644
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -1777,7 +1777,7 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah)
struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
u16 capField = 0, eeval;
- u8 ant_div_ctl1;
+ u8 ant_div_ctl1, tx_chainmask, rx_chainmask;
eeval = ah->eep_ops->get_eeprom(ah, EEP_REG_0);
regulatory->current_rd = eeval;
@@ -1989,6 +1989,18 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah)
pCap->pcie_lcr_offset = 0x80;
}
+ tx_chainmask = pCap->tx_chainmask;
+ rx_chainmask = pCap->rx_chainmask;
+ while (tx_chainmask || rx_chainmask) {
+ if (tx_chainmask & BIT(0))
+ pCap->max_txchains++;
+ if (rx_chainmask & BIT(0))
+ pCap->max_rxchains++;
+
+ tx_chainmask >>= 1;
+ rx_chainmask >>= 1;
+ }
+
return 0;
}
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h
index 1eb6a14..bd0717e 100644
--- a/drivers/net/wireless/ath/ath9k/hw.h
+++ b/drivers/net/wireless/ath/ath9k/hw.h
@@ -200,6 +200,8 @@ struct ath9k_hw_capabilities {
u16 rts_aggr_limit;
u8 tx_chainmask;
u8 rx_chainmask;
+ u8 max_txchains;
+ u8 max_rxchains;
u16 tx_triglevel_max;
u16 reg_cap;
u8 num_gpio_pins;
--
1.7.0.4
next prev parent reply other threads:[~2010-12-06 12:30 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-12-06 12:27 [PATCH V3 00/27] Add support for AR9485 Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 01/27] ath9k_hw: Define hw version macros " Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 02/27] ath9k_hw: Add initvals.h " Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 03/27] ath9k_hw: Enable hw initialization " Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 04/27] ath9k_hw: Initialize mode registers " Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 05/27] ath9k_hw: Initialize tx/rx gain table from initvals.h " Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 06/27] ath9k_hw: Eeeprom changes " Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 07/27] ath9k_hw: Disable LDPC " Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 08/27] ath9k: Disable TX STBC " Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 09/27] ath9k: Enable extended synch for AR9485 to fix L0s recovery issue Vasanthakumar Thiagarajan
2010-12-06 12:27 ` Vasanthakumar Thiagarajan [this message]
2010-12-06 12:27 ` [PATCH V3 11/27] ath9k: Configure pll control for AR9485 Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 12/27] ath9k_hw: Find chansel of AR_PHY_65NM_CH0_SYNTH7 " Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 13/27] ath9k_hw: Add a helper function to get spur channel pointer from cal data for AR9003 family Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 14/27] ath9k: Read spur channel information from eeprom for AR9485 Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 15/27] ath9k_hw: Configure xpa bias level " Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 16/27] ath9k_hw: Read and configure antenna diversity control " Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 17/27] ath9k_hw: Configure attenuation control only for supported chains Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 18/27] ath9k_hw: Configure internal regulator for AR9485 Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 19/27] ath9k_hw: Read and configure turnning caps to regulate freq accuracy Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 20/27] ath9k_hw: Configure power control only for the supported chains Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 21/27] ath9k_hw: Program appropriate chianmask for AR9485 before starting AGC/IQ cal Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 22/27] ath9k_hw: Define IQcal correction coefficient registers using index Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 23/27] ath9k_hw: Add IQ cal changes for AR9485 Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 24/27] ath9k_hw: Program appropriate register for temperature compensation cal " Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 25/27] ath9k_hw: Setup paprd only for supported chains Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 26/27] ath9k_hw: Disable MRC CCK for AR9485 Vasanthakumar Thiagarajan
2010-12-06 12:28 ` [PATCH V3 27/27] ath9k: Add device id of AR9485 to pci table Vasanthakumar Thiagarajan
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