From: Vasanthakumar Thiagarajan <vasanth@atheros.com>
To: <linville@tuxdriver.com>
Cc: <linux-wireless@vger.kernel.org>
Subject: [PATCH V3 15/27] ath9k_hw: Configure xpa bias level for AR9485
Date: Mon, 6 Dec 2010 04:27:48 -0800 [thread overview]
Message-ID: <1291638480-8950-16-git-send-email-vasanth@atheros.com> (raw)
In-Reply-To: <1291638480-8950-1-git-send-email-vasanth@atheros.com>
Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
---
drivers/net/wireless/ath/ath9k/ar9003_eeprom.c | 12 +++++++++---
drivers/net/wireless/ath/ath9k/ar9003_phy.h | 4 ++++
2 files changed, 13 insertions(+), 3 deletions(-)
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
index adba317..53365e7 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
@@ -3452,9 +3452,15 @@ static s32 ar9003_hw_xpa_bias_level_get(struct ath_hw *ah, bool is2ghz)
static void ar9003_hw_xpa_bias_level_apply(struct ath_hw *ah, bool is2ghz)
{
int bias = ar9003_hw_xpa_bias_level_get(ah, is2ghz);
- REG_RMW_FIELD(ah, AR_CH0_TOP, AR_CH0_TOP_XPABIASLVL, bias);
- REG_RMW_FIELD(ah, AR_CH0_THERM, AR_CH0_THERM_XPABIASLVL_MSB, bias >> 2);
- REG_RMW_FIELD(ah, AR_CH0_THERM, AR_CH0_THERM_XPASHORT2GND, 1);
+
+ if (AR_SREV_9485(ah))
+ REG_RMW_FIELD(ah, AR_CH0_TOP2, AR_CH0_TOP2_XPABIASLVL, bias);
+ else {
+ REG_RMW_FIELD(ah, AR_CH0_TOP, AR_CH0_TOP_XPABIASLVL, bias);
+ REG_RMW_FIELD(ah, AR_CH0_THERM, AR_CH0_THERM_XPABIASLVL_MSB,
+ bias >> 2);
+ REG_RMW_FIELD(ah, AR_CH0_THERM, AR_CH0_THERM_XPASHORT2GND, 1);
+ }
}
static u32 ar9003_hw_ant_ctrl_common_get(struct ath_hw *ah, bool is2ghz)
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.h b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
index 3394dfe..b772081 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.h
+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
@@ -584,6 +584,10 @@
#define AR_PHY_65NM_CH2_RXTX1 0x16900
#define AR_PHY_65NM_CH2_RXTX2 0x16904
+#define AR_CH0_TOP2 (AR_SREV_9485(ah) ? 0x00016284 : 0x0001628c)
+#define AR_CH0_TOP2_XPABIASLVL 0xf000
+#define AR_CH0_TOP2_XPABIASLVL_S 12
+
#define AR_PHY_RX1DB_BIQUAD_LONG_SHIFT 0x00380000
#define AR_PHY_RX1DB_BIQUAD_LONG_SHIFT_S 19
#define AR_PHY_RX6DB_BIQUAD_LONG_SHIFT 0x00c00000
--
1.7.0.4
next prev parent reply other threads:[~2010-12-06 12:31 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-12-06 12:27 [PATCH V3 00/27] Add support for AR9485 Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 01/27] ath9k_hw: Define hw version macros " Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 02/27] ath9k_hw: Add initvals.h " Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 03/27] ath9k_hw: Enable hw initialization " Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 04/27] ath9k_hw: Initialize mode registers " Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 05/27] ath9k_hw: Initialize tx/rx gain table from initvals.h " Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 06/27] ath9k_hw: Eeeprom changes " Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 07/27] ath9k_hw: Disable LDPC " Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 08/27] ath9k: Disable TX STBC " Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 09/27] ath9k: Enable extended synch for AR9485 to fix L0s recovery issue Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 10/27] ath9k_hw: Find the maximum number of chains that hw supports Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 11/27] ath9k: Configure pll control for AR9485 Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 12/27] ath9k_hw: Find chansel of AR_PHY_65NM_CH0_SYNTH7 " Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 13/27] ath9k_hw: Add a helper function to get spur channel pointer from cal data for AR9003 family Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 14/27] ath9k: Read spur channel information from eeprom for AR9485 Vasanthakumar Thiagarajan
2010-12-06 12:27 ` Vasanthakumar Thiagarajan [this message]
2010-12-06 12:27 ` [PATCH V3 16/27] ath9k_hw: Read and configure antenna diversity control " Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 17/27] ath9k_hw: Configure attenuation control only for supported chains Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 18/27] ath9k_hw: Configure internal regulator for AR9485 Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 19/27] ath9k_hw: Read and configure turnning caps to regulate freq accuracy Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 20/27] ath9k_hw: Configure power control only for the supported chains Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 21/27] ath9k_hw: Program appropriate chianmask for AR9485 before starting AGC/IQ cal Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 22/27] ath9k_hw: Define IQcal correction coefficient registers using index Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 23/27] ath9k_hw: Add IQ cal changes for AR9485 Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 24/27] ath9k_hw: Program appropriate register for temperature compensation cal " Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 25/27] ath9k_hw: Setup paprd only for supported chains Vasanthakumar Thiagarajan
2010-12-06 12:27 ` [PATCH V3 26/27] ath9k_hw: Disable MRC CCK for AR9485 Vasanthakumar Thiagarajan
2010-12-06 12:28 ` [PATCH V3 27/27] ath9k: Add device id of AR9485 to pci table Vasanthakumar Thiagarajan
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