From: Vasanthakumar Thiagarajan <vasanth@atheros.com>
To: <linville@tuxdriver.com>
Cc: <linux-wireless@vger.kernel.org>
Subject: [PATCH 10/22] ath9k_hw: Configure RF channel freqency for AR9340
Date: Tue, 12 Apr 2011 18:47:46 +0530 [thread overview]
Message-ID: <1302614273-2063-6-git-send-email-vasanth@atheros.com> (raw)
In-Reply-To: <1302614273-2063-1-git-send-email-vasanth@atheros.com>
Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
---
drivers/net/wireless/ath/ath9k/ar9003_phy.c | 23 ++++++++++++++++++++---
1 files changed, 20 insertions(+), 3 deletions(-)
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.c b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
index 65c52b4..1ec0d72 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
@@ -86,14 +86,31 @@ static int ar9003_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
channelSel = (freq * 4) / 120;
chan_frac = (((freq * 4) % 120) * 0x20000) / 120;
channelSel = (channelSel << 17) | chan_frac;
+ } else if (AR_SREV_9340(ah)) {
+ if (ah->is_clk_25mhz) {
+ u32 chan_frac;
+
+ channelSel = (freq * 2) / 75;
+ chan_frac = (((freq * 2) % 75) * 0x20000) / 75;
+ channelSel = (channelSel << 17) | chan_frac;
+ } else
+ channelSel = CHANSEL_2G(freq) >> 1;
} else
channelSel = CHANSEL_2G(freq);
/* Set to 2G mode */
bMode = 1;
} else {
- channelSel = CHANSEL_5G(freq);
- /* Doubler is ON, so, divide channelSel by 2. */
- channelSel >>= 1;
+ if (AR_SREV_9340(ah) && ah->is_clk_25mhz) {
+ u32 chan_frac;
+
+ channelSel = (freq * 2) / 75;
+ chan_frac = ((freq % 75) * 0x20000) / 75;
+ channelSel = (channelSel << 17) | chan_frac;
+ } else {
+ channelSel = CHANSEL_5G(freq);
+ /* Doubler is ON, so, divide channelSel by 2. */
+ channelSel >>= 1;
+ }
/* Set to 5G mode */
bMode = 0;
}
--
1.7.0.4
next prev parent reply other threads:[~2011-04-12 13:18 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-04-12 13:17 [PATCH 03/22] ath9k_hw: Introduce a bool for 25mhz clock and populate it Vasanthakumar Thiagarajan
2011-04-12 13:17 ` [PATCH 04/22] ath9k_hw: Configure pll control register accordingly for AR9340 Vasanthakumar Thiagarajan
2011-04-12 13:17 ` [PATCH 06/22] ath9k_hw: Initialize mode registers from initvals.h " Vasanthakumar Thiagarajan
2011-04-12 13:17 ` [PATCH 07/22] ath9k_hw: Don't do ani initialization " Vasanthakumar Thiagarajan
2011-04-12 13:17 ` [PATCH 09/22] ath9k_hw: Read spur frequency information from eeprom " Vasanthakumar Thiagarajan
2011-04-12 13:17 ` Vasanthakumar Thiagarajan [this message]
2011-04-12 13:17 ` [PATCH 11/22] ath9k_hw: Clean up rx/tx chain configuration before AGC/IQ cal Vasanthakumar Thiagarajan
2011-04-12 13:17 ` [PATCH 14/22] ath9k_hw: Skip internal regulator configuration for AR9340 Vasanthakumar Thiagarajan
2011-04-12 13:17 ` [PATCH 15/22] ath9k_hw: Configure tuning capacitance value for AR9340 as well Vasanthakumar Thiagarajan
2011-04-12 13:17 ` [PATCH 17/22] ath9k_hw: Configure chain switch table and attenuation control only for active chains Vasanthakumar Thiagarajan
2011-04-12 13:17 ` [PATCH 18/22] ath9k_hw: Read iq calibration data " Vasanthakumar Thiagarajan
2011-04-12 13:17 ` [PATCH 21/22] ath9k_hw: Disable INTR_HOST1_FATAL to avoid interrupt strom with ar9430 Vasanthakumar Thiagarajan
2011-04-12 13:17 ` [PATCH 22/22] ath9k_hw: Enable AR9340 support Vasanthakumar Thiagarajan
2011-04-12 13:50 ` [PATCH 03/22] ath9k_hw: Introduce a bool for 25mhz clock and populate it Felix Fietkau
2011-04-12 14:00 ` Vasanthakumar Thiagarajan
2011-04-12 14:33 ` Vasanthakumar Thiagarajan
2011-04-12 14:51 ` John W. Linville
2011-04-19 5:49 ` Vasanthakumar Thiagarajan
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