From: Vasanthakumar Thiagarajan <vasanth@atheros.com>
To: <linville@tuxdriver.com>
Cc: <linux-wireless@vger.kernel.org>
Subject: [PATCH 11/22] ath9k_hw: Clean up rx/tx chain configuration before AGC/IQ cal
Date: Tue, 12 Apr 2011 18:47:47 +0530 [thread overview]
Message-ID: <1302614273-2063-7-git-send-email-vasanth@atheros.com> (raw)
In-Reply-To: <1302614273-2063-1-git-send-email-vasanth@atheros.com>
Use hw supported chains instead of hard coded values.
Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
---
drivers/net/wireless/ath/ath9k/ar9003_calib.c | 13 +++++--------
1 files changed, 5 insertions(+), 8 deletions(-)
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_calib.c b/drivers/net/wireless/ath/ath9k/ar9003_calib.c
index 4a4cd88..09f3aa7 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_calib.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_calib.c
@@ -940,21 +940,18 @@ static bool ar9003_hw_init_cal(struct ath_hw *ah,
struct ath9k_channel *chan)
{
struct ath_common *common = ath9k_hw_common(ah);
+ struct ath9k_hw_capabilities *pCap = &ah->caps;
int val;
val = REG_READ(ah, AR_ENT_OTP);
ath_dbg(common, ATH_DBG_CALIBRATE, "ath9k: AR_ENT_OTP 0x%x\n", val);
- if (AR_SREV_9485(ah))
- ar9003_hw_set_chain_masks(ah, 0x1, 0x1);
- else if (val & AR_ENT_OTP_CHAIN2_DISABLE)
+ /* Configure rx/tx chains before running AGC/TxiQ cals */
+ if (val & AR_ENT_OTP_CHAIN2_DISABLE)
ar9003_hw_set_chain_masks(ah, 0x3, 0x3);
else
- /*
- * 0x7 = 0b111 , AR9003 needs to be configured for 3-chain
- * mode before running AGC/TxIQ cals
- */
- ar9003_hw_set_chain_masks(ah, 0x7, 0x7);
+ ar9003_hw_set_chain_masks(ah, pCap->rx_chainmask,
+ pCap->tx_chainmask);
/* Do Tx IQ Calibration */
if (AR_SREV_9485(ah))
--
1.7.0.4
next prev parent reply other threads:[~2011-04-12 13:18 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-04-12 13:17 [PATCH 03/22] ath9k_hw: Introduce a bool for 25mhz clock and populate it Vasanthakumar Thiagarajan
2011-04-12 13:17 ` [PATCH 04/22] ath9k_hw: Configure pll control register accordingly for AR9340 Vasanthakumar Thiagarajan
2011-04-12 13:17 ` [PATCH 06/22] ath9k_hw: Initialize mode registers from initvals.h " Vasanthakumar Thiagarajan
2011-04-12 13:17 ` [PATCH 07/22] ath9k_hw: Don't do ani initialization " Vasanthakumar Thiagarajan
2011-04-12 13:17 ` [PATCH 09/22] ath9k_hw: Read spur frequency information from eeprom " Vasanthakumar Thiagarajan
2011-04-12 13:17 ` [PATCH 10/22] ath9k_hw: Configure RF channel freqency " Vasanthakumar Thiagarajan
2011-04-12 13:17 ` Vasanthakumar Thiagarajan [this message]
2011-04-12 13:17 ` [PATCH 14/22] ath9k_hw: Skip internal regulator configuration " Vasanthakumar Thiagarajan
2011-04-12 13:17 ` [PATCH 15/22] ath9k_hw: Configure tuning capacitance value for AR9340 as well Vasanthakumar Thiagarajan
2011-04-12 13:17 ` [PATCH 17/22] ath9k_hw: Configure chain switch table and attenuation control only for active chains Vasanthakumar Thiagarajan
2011-04-12 13:17 ` [PATCH 18/22] ath9k_hw: Read iq calibration data " Vasanthakumar Thiagarajan
2011-04-12 13:17 ` [PATCH 21/22] ath9k_hw: Disable INTR_HOST1_FATAL to avoid interrupt strom with ar9430 Vasanthakumar Thiagarajan
2011-04-12 13:17 ` [PATCH 22/22] ath9k_hw: Enable AR9340 support Vasanthakumar Thiagarajan
2011-04-12 13:50 ` [PATCH 03/22] ath9k_hw: Introduce a bool for 25mhz clock and populate it Felix Fietkau
2011-04-12 14:00 ` Vasanthakumar Thiagarajan
2011-04-12 14:33 ` Vasanthakumar Thiagarajan
2011-04-12 14:51 ` John W. Linville
2011-04-19 5:49 ` Vasanthakumar Thiagarajan
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