From: Sujith Manoharan <sujith@msujith.org>
To: linux-wireless@vger.kernel.org
Subject: [PATCH 1/5] ath9k: Add PCIE powersave macros
Date: Mon, 9 Mar 2015 14:20:06 +0530 [thread overview]
Message-ID: <1425891010-21522-2-git-send-email-sujith@msujith.org> (raw)
In-Reply-To: <1425891010-21522-1-git-send-email-sujith@msujith.org>
From: Sujith Manoharan <c_manoha@qca.qualcomm.com>
These will be used to handle chip-specific
power save configuration.
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
---
drivers/net/wireless/ath/ath9k/hw.h | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h
index 29a25d9..2bb3b33 100644
--- a/drivers/net/wireless/ath/ath9k/hw.h
+++ b/drivers/net/wireless/ath/ath9k/hw.h
@@ -309,6 +309,12 @@ enum ath9k_hw_hang_checks {
HW_MAC_HANG = BIT(5),
};
+#define AR_PCIE_PLL_PWRSAVE_CONTROL BIT(0)
+#define AR_PCIE_PLL_PWRSAVE_ON_D3 BIT(1)
+#define AR_PCIE_PLL_PWRSAVE_ON_D0 BIT(2)
+#define AR_PCIE_CDR_PWRSAVE_ON_D3 BIT(3)
+#define AR_PCIE_CDR_PWRSAVE_ON_D0 BIT(4)
+
struct ath9k_ops_config {
int dma_beacon_response_time;
int sw_beacon_response_time;
--
2.3.1
next prev parent reply other threads:[~2015-03-09 8:46 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-09 8:50 [PATCH 0/5] ath9k patches Sujith Manoharan
2015-03-09 8:50 ` Sujith Manoharan [this message]
2015-03-13 13:20 ` [1/5] ath9k: Add PCIE powersave macros Kalle Valo
2015-03-09 8:50 ` [PATCH 2/5] ath9k: Fix PLL powersave for AR9485 Sujith Manoharan
2015-03-09 8:50 ` [PATCH 3/5] ath9k: Initialize pll_pwrsave for AR9462/AR9565 Sujith Manoharan
2015-03-09 8:50 ` [PATCH 4/5] ath9k: Check allowed PCIE powersave configuration Sujith Manoharan
2015-03-09 8:50 ` [PATCH 5/5] ath9k: Fix RTT chainmask usage Sujith Manoharan
2015-03-13 13:31 ` [PATCH 0/5] ath9k patches Kalle Valo
2015-03-14 0:21 ` Sujith Manoharan
2015-03-14 4:35 ` Felix Fietkau
2015-03-14 5:56 ` Sujith Manoharan
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