From: David Decotigny <ddecotig@gmail.com>
To: Larry Finger <Larry.Finger@lwfinger.net>,
Jes Sorensen <Jes.Sorensen@redhat.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
linux-wireless@vger.kernel.org, devel@driverdev.osuosl.org,
linux-kernel@vger.kernel.org
Cc: Joe Perches <joe@perches.com>,
Dan Carpenter <dan.carpenter@oracle.com>,
David Decotigny <ddecotig@gmail.com>
Subject: [PATCH v2 0/2] staging: rtl8723au: core: endianness issues
Date: Sun, 7 Jun 2015 17:43:00 -0700 [thread overview]
Message-ID: <1433724182-657-1-git-send-email-ddecotig@gmail.com> (raw)
The code shows a couple inconsistencies (described in commit
descriptions) which would not be an issue on little-endian cpus, but
could cause breakage on non-LE cpus. Note: I could not test on real
hardware, these patches created based on sparse reports.
Hostory:
- resending the same patches to correct recipients, only changed
commit descriptions (credits to Dan Carpenter)
############################################
# Patch Set Summary:
David Decotigny (2):
staging: rtl8723au: core: avoid bitwise arithmetic with forced
endianness
staging: rtl8723au: core: remove redundant endianness conversion
drivers/staging/rtl8723au/core/rtw_mlme_ext.c | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
--
2.2.0.rc0.207.ga3a616c
next reply other threads:[~2015-06-08 0:43 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-08 0:43 David Decotigny [this message]
2015-06-08 0:43 ` [PATCH v2 1/2] staging: rtl8723au: core: avoid bitwise arithmetic with forced endianness David Decotigny
2015-06-08 0:43 ` [PATCH v2 2/2] staging: rtl8723au: core: remove redundant endianness conversion David Decotigny
2015-06-08 8:40 ` [PATCH v2 0/2] staging: rtl8723au: core: endianness issues Dan Carpenter
2015-06-25 14:33 ` Jes Sorensen
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