[PATCH 4/7] ath5k: Fix clock on OFDM timing computation

["Luis R. Rodriguez" <mcgrof@gmail.com>]

We were setting the clock to the turbo sampling rate always, lets fix this
for plain OFDM sampling rate at 40 MHz. I believe this tunes the PLL to
the desired frequency, by setting the mantissa and the exponent.

Changes to hw.c
Changes-licensed-under: ISC

Signed-off-by: Luis R. Rodriguez <mcgrof@gmail.com>
---
 drivers/net/wireless/ath5k/hw.c |    3 ++-
 1 files changed, 2 insertions(+), 1 deletions(-)

diff --git a/drivers/net/wireless/ath5k/hw.c b/drivers/net/wireless/ath5k/hw.c
index 17c46e1..3f78d20 100644
--- a/drivers/net/wireless/ath5k/hw.c
+++ b/drivers/net/wireless/ath5k/hw.c
@@ -698,10 +698,11 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum ieee80211_if_types op_mode,
 		/* Write OFDM timings on 5212*/
 		if (ah->ah_version == AR5K_AR5212) {
 			if (channel->val & CHANNEL_OFDM) {
+				/* Get exponent and mantissa and set it */
 				u32 coef_scaled, coef_exp, coef_man,
 					ds_coef_exp, ds_coef_man, clock;
 
-				clock = channel->val & CHANNEL_T ? 80 : 40;
+				clock = channel->val & CHANNEL_TURBO ? 80 : 40;
 				coef_scaled = ((5 * (clock << 24)) / 2) /
 					channel->freq;
 
-- 
1.5.2.5