From: Vasanthakumar Thiagarajan <vasanth@atheros.com>
To: Felix Fietkau <nbd@openwrt.org>
Cc: Vasanth Thiagarajan <Vasanth.Thiagarajan@Atheros.com>,
"linville@tuxdriver.com" <linville@tuxdriver.com>,
"linux-wireless@vger.kernel.org" <linux-wireless@vger.kernel.org>
Subject: Re: [PATCH V2 12/27] ath9k_hw: Find chansel of AR_PHY_65NM_CH0_SYNTH7 from an array for AR9485
Date: Mon, 6 Dec 2010 17:14:02 +0530 [thread overview]
Message-ID: <20101206114401.GT12908@vasanth-laptop> (raw)
In-Reply-To: <4CFCBE04.7070509@openwrt.org>
> > I don't have any doc for this register yet.
> I'm pretty sure that the format of the register is still exactly the
> same. I guess they added a small frequency offset to reduce spur.
>
> >> But how exactly is *one* magic number (and it's even a very small one)
> >> worse than 14 of them, especially since anybody can verify that the
> >> generated raw values are exactly the same?
> >
> > Anyway, still this formula gets it wrong for channel 14.
> > Lets have this table for now, I'll clean this up once I
> > get the proper doc for this register?.
> How did you test this? When I put this part into a test program, it
> generates exactly the same values as the table all channels,
> including 14.
I just did the following
#define CHANSEL_2G_9485(_freq) ((((freq) * 0x10000) - 215) / CHANSEL_DIV)
for (i = 0; i < 14; i++) {
freq = 2412 + (i * 5);
printk("chan %d : %x \n",i + 1,CHANSEL_2G_9485(freq));
}
output:
chan 1 : a0ccbe
chan 2 : a12213
chan 3 : a17769
chan 4 : a1ccbe
chan 5 : a22213
chan 6 : a27769
chan 7 : a2ccbe
chan 8 : a32213
chan 9 : a37769
chan 10 : a3ccbe
chan 11 : a42213
chan 12 : a47769
chan 13 : a4ccbe
chan 14 : a52213
Vasanth
next prev parent reply other threads:[~2010-12-06 11:44 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-12-02 11:06 [PATCH V2 00/27] Add support for AR9485 Vasanthakumar Thiagarajan
2010-12-02 11:06 ` [PATCH V2 01/27] ath9k_hw: Define hw version macros " Vasanthakumar Thiagarajan
2010-12-02 11:06 ` [PATCH V2 02/27] ath9k_hw: Add initvals.h " Vasanthakumar Thiagarajan
2010-12-02 11:06 ` [PATCH V2 03/27] ath9k_hw: Enable hw initialization " Vasanthakumar Thiagarajan
2010-12-02 11:06 ` [PATCH V2 04/27] ath9k_hw: Initialize mode registers " Vasanthakumar Thiagarajan
2010-12-02 11:06 ` [PATCH V2 05/27] ath9k_hw: Initialize tx/rx gain table from initvals.h " Vasanthakumar Thiagarajan
2010-12-02 11:06 ` [PATCH V2 06/27] ath9k_hw: Eeeprom changes " Vasanthakumar Thiagarajan
2010-12-02 11:06 ` [PATCH V2 07/27] ath9k_hw: Disable LDPC " Vasanthakumar Thiagarajan
2010-12-02 11:06 ` [PATCH V2 08/27] ath9k: Disable TX STBC " Vasanthakumar Thiagarajan
2010-12-02 11:06 ` [PATCH V2 09/27] ath9k: Enable extended synch for AR9485 to fix L0s recovery issue Vasanthakumar Thiagarajan
2010-12-02 11:06 ` [PATCH V2 10/27] ath9k_hw: Find the maximum number of chains that hw supports Vasanthakumar Thiagarajan
2010-12-02 11:06 ` [PATCH V2 11/27] ath9k_hw: Configure pll control for AR9485 Vasanthakumar Thiagarajan
2010-12-02 11:06 ` [PATCH V2 12/27] ath9k_hw: Find chansel of AR_PHY_65NM_CH0_SYNTH7 from an array " Vasanthakumar Thiagarajan
2010-12-03 1:45 ` Felix Fietkau
2010-12-03 4:50 ` Vasanthakumar Thiagarajan
2010-12-03 12:14 ` Felix Fietkau
2010-12-03 12:40 ` Vasanthakumar Thiagarajan
2010-12-03 12:48 ` Felix Fietkau
2010-12-06 6:03 ` Vasanthakumar Thiagarajan
2010-12-06 10:42 ` Felix Fietkau
2010-12-06 11:44 ` Vasanthakumar Thiagarajan [this message]
2010-12-06 11:50 ` Felix Fietkau
2010-12-06 11:54 ` Vasanthakumar Thiagarajan
2010-12-06 11:51 ` Johannes Berg
2010-12-02 11:06 ` [PATCH V2 13/27] ath9k_hw: Add a helper function to get spur channel pointer from cal data for AR9003 family Vasanthakumar Thiagarajan
2010-12-02 11:06 ` [PATCH V2 14/27] ath9k_hw: Read spur channel information from eeprom for AR9485 Vasanthakumar Thiagarajan
2010-12-02 11:06 ` [PATCH V2 15/27] ath9k_hw: Configure xpa bias level " Vasanthakumar Thiagarajan
2010-12-02 11:07 ` [PATCH V2 16/27] ath9k_hw: Read and configure antenna diversity control " Vasanthakumar Thiagarajan
2010-12-02 11:22 ` Julian Calaby
2010-12-02 12:09 ` Vasanthakumar Thiagarajan
2010-12-02 12:16 ` Julian Calaby
2010-12-02 12:21 ` Vasanthakumar Thiagarajan
2010-12-02 12:29 ` Julian Calaby
2010-12-02 11:07 ` [PATCH V2 17/27] ath9k_hw: Configure attenuation control only for supported chains Vasanthakumar Thiagarajan
2010-12-02 11:07 ` [PATCH V2 18/27] ath9k_hw: Configure internal regulator for AR9485 Vasanthakumar Thiagarajan
2010-12-02 11:07 ` [PATCH V2 19/27] ath9k_hw: Read and configure turnning caps to regulate freq accuracy Vasanthakumar Thiagarajan
2010-12-02 11:07 ` [PATCH V2 20/27] ath9k_hw: Configure power control only for the supported chains Vasanthakumar Thiagarajan
2010-12-02 11:07 ` [PATCH V2 21/27] ath9k_hw: Program appropriate chianmask for AR9485 before starting AGC/IQ cal Vasanthakumar Thiagarajan
2010-12-02 11:07 ` [PATCH V2 22/27] ath9k_hw: Define IQcal correction coefficient registers using index Vasanthakumar Thiagarajan
2010-12-02 11:07 ` [PATCH V2 23/27] ath9k_hw: Add IQ cal changes for AR9485 Vasanthakumar Thiagarajan
2010-12-02 11:07 ` [PATCH V2 24/27] ath9k_hw: Program appropriate register for temperature compensation cal " Vasanthakumar Thiagarajan
2010-12-02 11:07 ` [PATCH V2 25/27] ath9k_hw: Setup paprd only for supported chains Vasanthakumar Thiagarajan
2010-12-02 11:07 ` [PATCH V2 26/27] ath9k_hw: Disable MRC CCK for AR9485 Vasanthakumar Thiagarajan
2010-12-02 11:07 ` [PATCH V2 27/27] ath9k: Add device id of AR9485 to pci table Vasanthakumar Thiagarajan
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