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From: Kalle Valo <kvalo@qca.qualcomm.com>
To: linux-wireless@vger.kernel.org
Cc: ath10k-devel@qca.qualcomm.com
Subject: [PATCH 02/29] ath10k: add bmi.h
Date: Wed, 15 May 2013 17:42:54 +0300	[thread overview]
Message-ID: <20130515144254.4492.14914.stgit@localhost6.localdomain6> (raw)
In-Reply-To: <20130515143356.4492.43033.stgit@localhost6.localdomain6>

Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
---
 drivers/net/wireless/ath/ath10k/bmi.h |  224 +++++++++++++++++++++++++++++++++
 1 file changed, 224 insertions(+)
 create mode 100644 drivers/net/wireless/ath/ath10k/bmi.h

diff --git a/drivers/net/wireless/ath/ath10k/bmi.h b/drivers/net/wireless/ath/ath10k/bmi.h
new file mode 100644
index 0000000..32c56aa
--- /dev/null
+++ b/drivers/net/wireless/ath/ath10k/bmi.h
@@ -0,0 +1,224 @@
+/*
+ * Copyright (c) 2005-2011 Atheros Communications Inc.
+ * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef _BMI_H_
+#define _BMI_H_
+
+#include "core.h"
+
+/*
+ * Bootloader Messaging Interface (BMI)
+ *
+ * BMI is a very simple messaging interface used during initialization
+ * to read memory, write memory, execute code, and to define an
+ * application entry PC.
+ *
+ * It is used to download an application to QCA988x, to provide
+ * patches to code that is already resident on QCA988x, and generally
+ * to examine and modify state.  The Host has an opportunity to use
+ * BMI only once during bootup.  Once the Host issues a BMI_DONE
+ * command, this opportunity ends.
+ *
+ * The Host writes BMI requests to mailbox0, and reads BMI responses
+ * from mailbox0.   BMI requests all begin with a command
+ * (see below for specific commands), and are followed by
+ * command-specific data.
+ *
+ * Flow control:
+ * The Host can only issue a command once the Target gives it a
+ * "BMI Command Credit", using AR8K Counter #4.  As soon as the
+ * Target has completed a command, it issues another BMI Command
+ * Credit (so the Host can issue the next command).
+ *
+ * BMI handles all required Target-side cache flushing.
+ */
+
+/* Maximum data size used for BMI transfers */
+#define BMI_MAX_DATA_SIZE	256
+
+/* len = cmd + addr + length */
+#define BMI_MAX_CMDBUF_SIZE (BMI_MAX_DATA_SIZE + \
+			sizeof(u32) + \
+			sizeof(u32) + \
+			sizeof(u32))
+
+/* BMI Commands */
+
+enum bmi_cmd_id {
+	BMI_NO_COMMAND          = 0,
+	BMI_DONE                = 1,
+	BMI_READ_MEMORY         = 2,
+	BMI_WRITE_MEMORY        = 3,
+	BMI_EXECUTE             = 4,
+	BMI_SET_APP_START       = 5,
+	BMI_READ_SOC_REGISTER   = 6,
+	BMI_READ_SOC_WORD       = 6,
+	BMI_WRITE_SOC_REGISTER  = 7,
+	BMI_WRITE_SOC_WORD      = 7,
+	BMI_GET_TARGET_ID       = 8,
+	BMI_GET_TARGET_INFO     = 8,
+	BMI_ROMPATCH_INSTALL    = 9,
+	BMI_ROMPATCH_UNINSTALL  = 10,
+	BMI_ROMPATCH_ACTIVATE   = 11,
+	BMI_ROMPATCH_DEACTIVATE = 12,
+	BMI_LZ_STREAM_START     = 13, /* should be followed by LZ_DATA */
+	BMI_LZ_DATA             = 14,
+	BMI_NVRAM_PROCESS       = 15,
+};
+
+#define BMI_NVRAM_SEG_NAME_SZ 16
+
+struct bmi_cmd {
+	__le32 id; /* enum bmi_cmd_id */
+	union {
+		struct {
+		} done;
+		struct {
+			__le32 addr;
+			__le32 len;
+		} read_mem;
+		struct {
+			__le32 addr;
+			__le32 len;
+			u8 payload[0];
+		} write_mem;
+		struct {
+			__le32 addr;
+			__le32 param;
+		} execute;
+		struct {
+			__le32 addr;
+		} set_app_start;
+		struct {
+			__le32 addr;
+		} read_soc_reg;
+		struct {
+			__le32 addr;
+			__le32 value;
+		} write_soc_reg;
+		struct {
+		} get_target_info;
+		struct {
+			__le32 rom_addr;
+			__le32 ram_addr; /* or value */
+			__le32 size;
+			__le32 activate; /* 0=install, but dont activate */
+		} rompatch_install;
+		struct {
+			__le32 patch_id;
+		} rompatch_uninstall;
+		struct {
+			__le32 count;
+			__le32 patch_ids[0]; /* length of @count */
+		} rompatch_activate;
+		struct {
+			__le32 count;
+			__le32 patch_ids[0]; /* length of @count */
+		} rompatch_deactivate;
+		struct {
+			__le32 addr;
+		} lz_start;
+		struct {
+			__le32 len; /* max BMI_MAX_DATA_SIZE */
+			u8 payload[0]; /* length of @len */
+		} lz_data;
+		struct {
+			u8 name[BMI_NVRAM_SEG_NAME_SZ];
+		} nvram_process;
+		u8 payload[BMI_MAX_CMDBUF_SIZE];
+	};
+} __packed;
+
+union bmi_resp {
+	struct {
+		u8 payload[0];
+	} read_mem;
+	struct {
+		__le32 result;
+	} execute;
+	struct {
+		__le32 value;
+	} read_soc_reg;
+	struct {
+		__le32 len;
+		__le32 version;
+		__le32 type;
+	} get_target_info;
+	struct {
+		__le32 patch_id;
+	} rompatch_install;
+	struct {
+		__le32 patch_id;
+	} rompatch_uninstall;
+	struct {
+		/* 0 = nothing executed
+		 * otherwise = NVRAM segment return value */
+		__le32 result;
+	} nvram_process;
+	u8 payload[BMI_MAX_CMDBUF_SIZE];
+} __packed;
+
+struct bmi_target_info {
+	u32 version;
+	u32 type;
+};
+
+
+/* in msec */
+#define BMI_COMMUNICATION_TIMEOUT_HZ (1*HZ)
+
+#define BMI_CE_NUM_TO_TARG 0
+#define BMI_CE_NUM_TO_HOST 1
+
+int ath10k_bmi_done(struct ath10k *ar);
+int ath10k_bmi_get_target_info(struct ath10k *ar,
+			       struct bmi_target_info *target_info);
+int ath10k_bmi_read_memory(struct ath10k *ar, u32 address,
+			   void *buffer, u32 length);
+int ath10k_bmi_write_memory(struct ath10k *ar, u32 address,
+			    const void *buffer, u32 length);
+
+#define ath10k_bmi_read32(ar, item, val)				\
+	({								\
+		int ret;						\
+		u32 addr;						\
+		__le32 tmp;						\
+									\
+		addr = host_interest_item_address(HI_ITEM(item));	\
+		ret = ath10k_bmi_read_memory(ar, addr, (u8 *)&tmp, 4); \
+		*val = __le32_to_cpu(tmp);				\
+		ret;							\
+	 })
+
+#define ath10k_bmi_write32(ar, item, val)				\
+	({								\
+		int ret;						\
+		u32 address;						\
+		__le32 v = __cpu_to_le32(val);				\
+									\
+		address = host_interest_item_address(HI_ITEM(item));	\
+		ret = ath10k_bmi_write_memory(ar, address,		\
+					      (u8 *)&v, sizeof(v));	\
+		ret;							\
+	})
+
+int ath10k_bmi_execute(struct ath10k *ar, u32 address, u32 *param);
+int ath10k_bmi_lz_stream_start(struct ath10k *ar, u32 address);
+int ath10k_bmi_lz_data(struct ath10k *ar, const void *buffer, u32 length);
+int ath10k_bmi_fast_download(struct ath10k *ar, u32 address,
+			     const void *buffer, u32 length);
+#endif /* _BMI_H_ */


  parent reply	other threads:[~2013-05-15 14:52 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-05-15 14:42 [PATCH 00/29] ath10k: mac80211 driver for Qualcomm Atheros qca988x devices Kalle Valo
2013-05-15 14:42 ` [PATCH 01/29] ath10k: add bmi.c Kalle Valo
2013-05-15 14:42 ` Kalle Valo [this message]
2013-05-15 15:01   ` [PATCH 02/29] ath10k: add bmi.h Johannes Berg
2013-05-15 15:17     ` Kalle Valo
2013-05-15 14:43 ` [PATCH 03/29] ath10k: add ce.c Kalle Valo
2013-05-15 14:43 ` [PATCH 04/29] ath10k: add ce.h Kalle Valo
2013-05-15 14:43 ` [PATCH 05/29] ath10k: add core.c Kalle Valo
2013-05-15 14:43 ` [PATCH 06/29] ath10k: add core.h Kalle Valo
2013-05-15 14:43 ` [PATCH 07/29] ath10k: add debug.c Kalle Valo
2013-05-15 14:43 ` [PATCH 08/29] ath10k: add debug.h Kalle Valo
2013-05-15 14:43 ` [PATCH 09/29] ath10k: add hif.h Kalle Valo
2013-05-15 14:44 ` [PATCH 10/29] ath10k: add htc.c Kalle Valo
2013-05-15 14:44 ` [PATCH 11/29] ath10k: add htc.h Kalle Valo
2013-05-15 14:44 ` [PATCH 12/29] ath10k: add htt.c Kalle Valo
2013-05-15 14:44 ` [PATCH 13/29] ath10k: add htt.h Kalle Valo
2013-05-15 14:44 ` [PATCH 14/29] ath10k: add htt_rx.c Kalle Valo
2013-05-15 14:44 ` [PATCH 15/29] ath10k: add htt_tx.c Kalle Valo
2013-05-15 14:45 ` [PATCH 16/29] ath10k: add hw.h Kalle Valo
2013-05-15 14:45 ` [PATCH 17/29] ath10k: add mac.c Kalle Valo
2013-05-15 14:45 ` [PATCH 18/29] ath10k: add mac.h Kalle Valo
2013-05-15 14:45 ` [PATCH 19/29] ath10k: add pci.c Kalle Valo
2013-05-15 14:45 ` [PATCH 20/29] ath10k: add pci.h Kalle Valo
2013-05-15 14:45 ` [PATCH 21/29] ath10k: add rx_desc.h Kalle Valo
2013-05-15 14:45 ` [PATCH 22/29] ath10k: add targaddrs.h Kalle Valo
2013-05-15 14:46 ` [PATCH 23/29] ath10k: add trace.c Kalle Valo
2013-05-15 14:46 ` [PATCH 24/29] ath10k: add trace.h Kalle Valo
2013-05-15 14:46 ` [PATCH 25/29] ath10k: add txrx.c Kalle Valo
2013-05-15 14:46 ` [PATCH 26/29] ath10k: add txrx.h Kalle Valo
2013-05-15 14:46 ` [PATCH 27/29] ath10k: add wmi.c Kalle Valo
2013-05-15 14:46 ` [PATCH 28/29] ath10k: add wmi.h Kalle Valo
2013-05-15 14:46 ` [PATCH 29/29] ath10k: add Kconfig and Makefile Kalle Valo
2013-05-15 15:52 ` [PATCH 00/29] ath10k: mac80211 driver for Qualcomm Atheros qca988x devices Joe Perches
2013-05-15 15:54   ` Sujith Manoharan
2013-05-15 16:08     ` Kalle Valo
2013-05-15 16:22       ` Kalle Valo

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