From: Rajkumar <rmanohar@qti.qualcomm.com>
To: <ath10k@lists.infradead.org>
Cc: <linux-wireless@vger.kernel.org>
Subject: Re: [PATCH v2 1/2] ath10k: Bypass PLL setting on target init for QCA9888
Date: Tue, 17 Feb 2015 12:41:29 +0530 [thread overview]
Message-ID: <20150217071125.GA27497@qca.qualcomm.com> (raw)
In-Reply-To: <1423460814-2767-1-git-send-email-rmanohar@qti.qualcomm.com>
On Mon, Feb 09, 2015 at 11:16:53AM +0530, Rajkumar Manoharan wrote:
> Some of of qca988x solutions are having global reset issue
> during target initialization. Bypassing PLL setting before
> downloading firmware and letting the SoC run on REF_CLK is fixing
> the problem. Corresponding firmware change is also needed to set
> the clock source once the target is initialized. Since 10.2.4
> firmware is having this ROM patch, applying skip_clock_init only
> for 10.2.4 firmware versions.
>
> Signed-off-by: Rajkumar Manoharan <rmanohar@qti.qualcomm.com>
> ---
> drivers/net/wireless/ath/ath10k/core.c | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
Kalle,
Its been pending for a while. Shall I resend this series?
-Rajkumar
next prev parent reply other threads:[~2015-02-17 7:11 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-02-09 5:46 [PATCH v2 1/2] ath10k: Bypass PLL setting on target init for QCA9888 Rajkumar Manoharan
2015-02-09 5:46 ` [PATCH v2 2/2] ath10k: Increase copy engine entries for rx wmi Rajkumar Manoharan
2015-02-09 22:54 ` Peter Oh
2015-02-10 7:26 ` Rajkumar
2015-03-05 13:53 ` Kalle Valo
2015-02-17 7:11 ` Rajkumar [this message]
2015-03-05 12:41 ` [PATCH v2 1/2] ath10k: Bypass PLL setting on target init for QCA9888 Kalle Valo
2015-03-15 8:06 ` Rajkumar Manoharan
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