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Date: Wed, 26 Oct 2016 14:06:48 -0700
From: Dmitry Torokhov <dmitry.torokhov@gmail.com>
To: Brian Norris <briannorris@chromium.org>
Cc: Rajat Jain <rajatja@google.com>, linux-wireless@vger.kernel.org,
        devicetree@vger.kernel.org, Xinming Hu <huxm@marvell.com>,
        Amitkumar Karwar <akarwar@marvell.com>,
        Brian Norris <briannorris@google.com>,
        Kalle Valo <kvalo@codeaurora.org>,
        Rob Herring <robh@kernel.org>,
        Rajat Jain <rajatxjain@gmail.com>
Subject: Re: [PATCH v6] mwifiex: parse device tree node for PCIe
Message-ID: <20161026210648.GE3989@dtor-ws> (sfid-20161026_230707_607393_07F9597C)
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On Wed, Oct 26, 2016 at 01:56:34PM -0700, Brian Norris wrote:
> On Wed, Oct 26, 2016 at 01:51:48PM -0700, Rajat Jain wrote:
> >    On Wed, Oct 26, 2016 at 1:46 PM, Dmitry Torokhov
> >    <dmitry.torokhov@gmail.com> wrote:
> >      On Wed, Oct 26, 2016 at 01:17:36PM -0700, Brian Norris wrote:
> >      Sorry, I just saw this... Why do we need devicetree data for
> >      discoverable bus (PCI)? How does the driver work on systems that do not
> >      use DT? Why do we need them to behave differently?
> > 
> >    There are a couple of out-of-band GPIO pins from Marvell chip that can
> >    serve as wake-up pins (wake up the CPU when asserted). The Marvell chip
> >    has to be told which GPIO pin is to be used as the wake-up pin. The pin to
> >    be used is system / platform dependent. (On some systems it could be
> >    GPIO13, on others it could be GPIO14 etc depending on how the marvell chip
> >    is wired up to the CPU).

So wakeup pin is not wired to PCIe WAKE?

> There's also calibration data. See "marvell,caldata*" and
> "marvell,wakeup-pin" properties. Currently only for SDIO, in
> Documentation/devicetree/bindings/net/wireless/marvell-sd8xxx.txt, but
> we're adding support for PCIe.

How would it all work if I moved the PCIe module from one device to
another?

Thanks.

-- 
Dmitry