From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED, USER_AGENT_NEOMUTT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 16086C282CE for ; Mon, 8 Apr 2019 07:46:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id DC5B020880 for ; Mon, 8 Apr 2019 07:46:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726515AbfDHHqh (ORCPT ); Mon, 8 Apr 2019 03:46:37 -0400 Received: from relay3-d.mail.gandi.net ([217.70.183.195]:39761 "EHLO relay3-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725923AbfDHHqg (ORCPT ); Mon, 8 Apr 2019 03:46:36 -0400 X-Originating-IP: 90.88.30.125 Received: from localhost (aaubervilliers-681-1-89-125.w90-88.abo.wanadoo.fr [90.88.30.125]) (Authenticated sender: maxime.ripard@bootlin.com) by relay3-d.mail.gandi.net (Postfix) with ESMTPSA id 0FC7E60002; Mon, 8 Apr 2019 07:46:28 +0000 (UTC) Date: Mon, 8 Apr 2019 09:46:28 +0200 From: Maxime Ripard To: megous@megous.com Cc: linux-sunxi@googlegroups.com, Chen-Yu Tsai , Rob Herring , Linus Walleij , David Airlie , Daniel Vetter , Mark Rutland , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , "David S. Miller" , Maxime Coquelin , Arend van Spriel , Franky Lin , Hante Meuleman , Chi-Hsien Lin , Wright Feng , Kalle Valo , Naveen Gupta , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-wireless@vger.kernel.org, brcm80211-dev-list.pdl@broadcom.com, brcm80211-dev-list@cypress.com, linux-gpio@vger.kernel.org Subject: Re: [PATCH 01/12] arm64: dts: allwinner: h6: Add Orange Pi 3 DTS Message-ID: <20190408074628.e5ers4gzlqz4coyk@flea> References: <20190405234514.6183-1-megous@megous.com> <20190405234514.6183-2-megous@megous.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="whh3wfah2ikk53mj" Content-Disposition: inline In-Reply-To: <20190405234514.6183-2-megous@megous.com> User-Agent: NeoMutt/20180716 Sender: linux-wireless-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org --whh3wfah2ikk53mj Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Sat, Apr 06, 2019 at 01:45:03AM +0200, megous@megous.com wrote: > From: Ondrej Jirman > > Orange Pi 3 is a H6 based SBC made by Xulong, released in > January 2019. It has the following features: > > - Allwinner H6 quad-core 64-bit ARM Cortex-A53 > - GPU Mali-T720 > - 1GB or 2GB LPDDR3 RAM > - AXP805 PMIC > - AP6256 Wifi/BT 5.0 > - USB 2.0 host port (A) > - USB 2.0 micro usb, OTG > - USB 3.0 Host + 4 port USB hub (GL3510) > - Gigabit Ethernet (Realtek RTL8211E phy) > - HDMI 2.0 port > - soldered eMMC (optional) > - 3x LED (one is on the bottom) > - microphone > - audio jack > - PCIe > > Add basic support for the board. > > Signed-off-by: Ondrej Jirman > --- > arch/arm64/boot/dts/allwinner/Makefile | 1 + > .../dts/allwinner/sun50i-h6-orangepi-3.dts | 212 ++++++++++++++++++ > 2 files changed, 213 insertions(+) > create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts > > diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts= /allwinner/Makefile > index e4dce2f6fa3a..285a7cb5135b 100644 > --- a/arch/arm64/boot/dts/allwinner/Makefile > +++ b/arch/arm64/boot/dts/allwinner/Makefile > @@ -20,6 +20,7 @@ dtb-$(CONFIG_ARCH_SUNXI) +=3D sun50i-h5-orangepi-pc2.dtb > dtb-$(CONFIG_ARCH_SUNXI) +=3D sun50i-h5-orangepi-prime.dtb > dtb-$(CONFIG_ARCH_SUNXI) +=3D sun50i-h5-orangepi-zero-plus.dtb > dtb-$(CONFIG_ARCH_SUNXI) +=3D sun50i-h5-orangepi-zero-plus2.dtb > +dtb-$(CONFIG_ARCH_SUNXI) +=3D sun50i-h6-orangepi-3.dtb > dtb-$(CONFIG_ARCH_SUNXI) +=3D sun50i-h6-orangepi-lite2.dtb > dtb-$(CONFIG_ARCH_SUNXI) +=3D sun50i-h6-orangepi-one-plus.dtb > dtb-$(CONFIG_ARCH_SUNXI) +=3D sun50i-h6-pine-h64.dtb > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts b/arc= h/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts > new file mode 100644 > index 000000000000..7a2424fcaed7 > --- /dev/null > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts > @@ -0,0 +1,212 @@ > +// SPDX-License-Identifier: (GPL-2.0+ or MIT) > +/* > + * Copyright (C) 2019 Ond=C5=99ej Jirman > + */ > + > +/dts-v1/; > + > +#include "sun50i-h6.dtsi" > + > +#include > + > +/ { > + model =3D "OrangePi 3"; > + compatible =3D "xunlong,orangepi-3", "allwinner,sun50i-h6"; As Clement pointed out, this should be documented in Documentation/devicetree/bindings/arm/sunxi.yaml It's part of sunxi/for-next only at this point, and it will go through a different branch than the H6 DTS, so it would be great to have it in a separate patch. > + aliases { > + serial0 =3D &uart0; > + }; > + > + chosen { > + stdout-path =3D "serial0:115200n8"; > + }; > + > + leds { > + compatible =3D "gpio-leds"; > + > + power { > + label =3D "orangepi:red:power"; > + gpios =3D <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */ > + default-state =3D "on"; > + }; > + > + status { > + label =3D "orangepi:green:status"; > + gpios =3D <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */ > + }; > + }; > + > + reg_vcc5v: vcc5v { > + /* board wide 5V supply directly from the DC jack */ > + compatible =3D "regulator-fixed"; > + regulator-name =3D "vcc-5v"; > + regulator-min-microvolt =3D <5000000>; > + regulator-max-microvolt =3D <5000000>; > + regulator-always-on; > + }; > +}; > + > +&cpu0 { > + cpu-supply =3D <®_dcdca>; > +}; > + > +&ehci0 { > + status =3D "okay"; > +}; > + > +&ehci3 { > + status =3D "okay"; > +}; > + > +&mmc0 { > + pinctrl-names =3D "default"; > + pinctrl-0 =3D <&mmc0_pins>; > + vmmc-supply =3D <®_cldo1>; > + cd-gpios =3D <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ > + bus-width =3D <4>; > + status =3D "okay"; > +}; > + > +&ohci0 { > + status =3D "okay"; > +}; > + > +&ohci3 { > + status =3D "okay"; > +}; > + > +&pio { > + vcc-pc-supply =3D <®_bldo2>; > + vcc-pd-supply =3D <®_cldo1>; > +}; > + > +&r_i2c { > + status =3D "okay"; > + > + axp805: pmic@36 { > + compatible =3D "x-powers,axp805", "x-powers,axp806"; > + reg =3D <0x36>; > + interrupt-parent =3D <&r_intc>; > + interrupts =3D <0 IRQ_TYPE_LEVEL_LOW>; > + interrupt-controller; > + #interrupt-cells =3D <1>; > + x-powers,self-working-mode; > + vina-supply =3D <®_vcc5v>; > + vinb-supply =3D <®_vcc5v>; > + vinc-supply =3D <®_vcc5v>; > + vind-supply =3D <®_vcc5v>; > + vine-supply =3D <®_vcc5v>; > + aldoin-supply =3D <®_vcc5v>; > + bldoin-supply =3D <®_vcc5v>; > + cldoin-supply =3D <®_vcc5v>; > + > + regulators { > + reg_aldo1: aldo1 { > + regulator-always-on; > + regulator-min-microvolt =3D <3300000>; > + regulator-max-microvolt =3D <3300000>; > + regulator-name =3D "vcc-pl-led-ir"; > + }; > + > + reg_aldo2: aldo2 { > + regulator-min-microvolt =3D <3300000>; > + regulator-max-microvolt =3D <3300000>; > + regulator-name =3D "vcc33-audio-tv-ephy-mac"; > + }; > + > + /* ALDO3 is shorted to CLDO1 */ > + reg_aldo3: aldo3 { > + regulator-always-on; > + regulator-min-microvolt =3D <3300000>; > + regulator-max-microvolt =3D <3300000>; > + regulator-name =3D "vcc33-io-pd-emmc-sd-usb-uart-1"; > + }; > + > + reg_bldo1: bldo1 { > + regulator-always-on; > + regulator-min-microvolt =3D <1800000>; > + regulator-max-microvolt =3D <1800000>; > + regulator-name =3D "vcc18-dram-bias-pll"; > + }; > + > + reg_bldo2: bldo2 { > + regulator-always-on; > + regulator-min-microvolt =3D <1800000>; > + regulator-max-microvolt =3D <1800000>; > + regulator-name =3D "vcc-efuse-pcie-hdmi-pc"; > + }; > + > + bldo3 { > + /* unused */ > + }; > + > + bldo4 { > + /* unused */ > + }; > + > + reg_cldo1: cldo1 { > + regulator-always-on; > + regulator-min-microvolt =3D <3300000>; > + regulator-max-microvolt =3D <3300000>; > + regulator-name =3D "vcc33-io-pd-emmc-sd-usb-uart-2"; > + }; > + > + cldo2 { > + /* unused */ > + }; > + > + cldo3 { > + /* unused */ > + }; > + > + reg_dcdca: dcdca { > + regulator-always-on; > + regulator-min-microvolt =3D <800000>; > + regulator-max-microvolt =3D <1160000>; > + regulator-name =3D "vdd-cpu"; > + }; > + > + reg_dcdcc: dcdcc { > + regulator-min-microvolt =3D <810000>; > + regulator-max-microvolt =3D <1080000>; > + regulator-name =3D "vdd-gpu"; > + }; > + > + reg_dcdcd: dcdcd { > + regulator-always-on; > + regulator-min-microvolt =3D <960000>; > + regulator-max-microvolt =3D <960000>; > + regulator-name =3D "vdd-sys"; > + }; > + > + reg_dcdce: dcdce { > + regulator-always-on; > + regulator-min-microvolt =3D <1200000>; > + regulator-max-microvolt =3D <1200000>; > + regulator-name =3D "vcc-dram"; > + }; > + > + sw { > + /* unused */ > + }; > + }; > + }; > +}; > + > +&uart0 { > + pinctrl-names =3D "default"; > + pinctrl-0 =3D <&uart0_ph_pins>; > + status =3D "okay"; > +}; > + > +&usb2otg { > + dr_mode =3D "host"; > + status =3D "okay"; > +}; > + > +&usb2phy { > + usb0_id_det-gpios =3D <&pio 2 15 GPIO_ACTIVE_HIGH>; /* PC15 */ > + usb0_vbus-supply =3D <®_vcc5v>; > + usb3_vbus-supply =3D <®_vcc5v>; > + status =3D "okay"; If we have an ID pin, then why is the OTG controller set to host? Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com --whh3wfah2ikk53mj Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCXKr8VAAKCRDj7w1vZxhR xSuDAQD5Wzy8cRaOqe3aeQQ2CVfL69KF96nL60hDcQFNYAMPvgEAmexKxfNT+yyJ zZocyxheq1948t3by+Q7ZcuekYVftQc= =+uSu -----END PGP SIGNATURE----- --whh3wfah2ikk53mj--