* [PATCH v2 00/11] rtw88: regular driver upgrade with minor changes
@ 2019-06-14 7:24 yhchuang
2019-06-14 7:24 ` [PATCH v2 01/11] rtw88: add fast xmit support yhchuang
` (10 more replies)
0 siblings, 11 replies; 13+ messages in thread
From: yhchuang @ 2019-06-14 7:24 UTC (permalink / raw)
To: kvalo; +Cc: linux-wireless
From: Yan-Hsuan Chuang <yhchuang@realtek.com>
These patch set are mostly minor fixes.
Some of them are adjustments for 8822c's phy setting.
DACK reload is to speed up hardware power on.
Beacon function setting make sure the hardware to sync the TSF
for the beacon intervals (station mode). For other modes, disable
TSF sync to avoid beacon interval getting violated.
And two of them make rtw88 has two new features "fast_xmit" and
"random mac scan"
v1 -> v2
- reduce magic numbers
- DACK reload still has many magic numbers, the calibration
routines is consisted with hardware registers, and those
registers do not have specific name or function
Chien-Hsun Liao (2):
rtw88: 8822c: add rf write protection when switching channel
rtw88: 8822c: update channel and bandwidth BB setting
Chin-Yen Lee (1):
rtw88: add beacon function setting
Tzu-En Huang (1):
rtw88: fix typo rtw_writ16_set
Yan-Hsuan Chuang (7):
rtw88: add fast xmit support
rtw88: add support for random mac scan
rtw88: 8822c: disable rx clock gating before counter reset
rtw88: 8822c: use more accurate ofdm fa counting
rtw88: power on again if it was already on
rtw88: restore DACK results to save time
rtw88: rsvd page should go though management queue
drivers/net/wireless/realtek/rtw88/hci.h | 2 +-
drivers/net/wireless/realtek/rtw88/mac.c | 8 +-
drivers/net/wireless/realtek/rtw88/mac80211.c | 32 ++
drivers/net/wireless/realtek/rtw88/main.c | 8 +
drivers/net/wireless/realtek/rtw88/main.h | 11 +
drivers/net/wireless/realtek/rtw88/phy.c | 13 +-
drivers/net/wireless/realtek/rtw88/rtw8822c.c | 436 ++++++++++++++++++++++++--
drivers/net/wireless/realtek/rtw88/rtw8822c.h | 23 ++
drivers/net/wireless/realtek/rtw88/tx.c | 2 +-
9 files changed, 504 insertions(+), 31 deletions(-)
--
2.7.4
^ permalink raw reply [flat|nested] 13+ messages in thread* [PATCH v2 01/11] rtw88: add fast xmit support 2019-06-14 7:24 [PATCH v2 00/11] rtw88: regular driver upgrade with minor changes yhchuang @ 2019-06-14 7:24 ` yhchuang 2019-06-25 5:09 ` Kalle Valo 2019-06-14 7:24 ` [PATCH v2 02/11] rtw88: add support for random mac scan yhchuang ` (9 subsequent siblings) 10 siblings, 1 reply; 13+ messages in thread From: yhchuang @ 2019-06-14 7:24 UTC (permalink / raw) To: kvalo; +Cc: linux-wireless From: Yan-Hsuan Chuang <yhchuang@realtek.com> With dynamic power save support, rtw88 is able to support fast tx path, claim it to mac80211. Signed-off-by: Yan-Hsuan Chuang <yhchuang@realtek.com> --- drivers/net/wireless/realtek/rtw88/main.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/wireless/realtek/rtw88/main.c b/drivers/net/wireless/realtek/rtw88/main.c index 142e530..d2e8d2e 100644 --- a/drivers/net/wireless/realtek/rtw88/main.c +++ b/drivers/net/wireless/realtek/rtw88/main.c @@ -1168,6 +1168,7 @@ int rtw_register_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw) ieee80211_hw_set(hw, REPORTS_TX_ACK_STATUS); ieee80211_hw_set(hw, SUPPORTS_PS); ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS); + ieee80211_hw_set(hw, SUPPORT_FAST_XMIT); hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_AP) | -- 2.7.4 ^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH v2 01/11] rtw88: add fast xmit support 2019-06-14 7:24 ` [PATCH v2 01/11] rtw88: add fast xmit support yhchuang @ 2019-06-25 5:09 ` Kalle Valo 0 siblings, 0 replies; 13+ messages in thread From: Kalle Valo @ 2019-06-25 5:09 UTC (permalink / raw) To: yhchuang; +Cc: linux-wireless <yhchuang@realtek.com> wrote: > From: Yan-Hsuan Chuang <yhchuang@realtek.com> > > With dynamic power save support, rtw88 is able to support fast tx > path, claim it to mac80211. > > Signed-off-by: Yan-Hsuan Chuang <yhchuang@realtek.com> 11 patches applied to wireless-drivers-next.git, thanks. e6fec313fa3f rtw88: add fast xmit support 44cc4c63a877 rtw88: add support for random mac scan 6fabdc4a34d0 rtw88: add beacon function setting 818d46e7715e rtw88: 8822c: add rf write protection when switching channel f859e71f9615 rtw88: 8822c: update channel and bandwidth BB setting e027446667b5 rtw88: 8822c: disable rx clock gating before counter reset e1cc056c92f9 rtw88: 8822c: use more accurate ofdm fa counting d41673b941f2 rtw88: power on again if it was already on a11cddd42b67 rtw88: restore DACK results to save time e9c87a3b744b rtw88: rsvd page should go though management queue 4a36de3996c7 rtw88: fix typo rtw_writ16_set -- https://patchwork.kernel.org/patch/10994533/ https://wireless.wiki.kernel.org/en/developers/documentation/submittingpatches ^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH v2 02/11] rtw88: add support for random mac scan 2019-06-14 7:24 [PATCH v2 00/11] rtw88: regular driver upgrade with minor changes yhchuang 2019-06-14 7:24 ` [PATCH v2 01/11] rtw88: add fast xmit support yhchuang @ 2019-06-14 7:24 ` yhchuang 2019-06-14 7:24 ` [PATCH v2 03/11] rtw88: add beacon function setting yhchuang ` (8 subsequent siblings) 10 siblings, 0 replies; 13+ messages in thread From: yhchuang @ 2019-06-14 7:24 UTC (permalink / raw) To: kvalo; +Cc: linux-wireless From: Yan-Hsuan Chuang <yhchuang@realtek.com> When driver uses random mac address to scan, the unicast probe response will not be received because the addr1 is not matched. Configure port address by requested mac address to receive probe response from AP. To support random mac scan, we need to configure the mac address during scan period to receive unicast prop_resp. After scan is completed, configure the mac address back to the original one that the port used. Signed-off-by: Yan-Hsuan Chuang <yhchuang@realtek.com> --- drivers/net/wireless/realtek/rtw88/mac80211.c | 19 +++++++++++++++++++ drivers/net/wireless/realtek/rtw88/main.c | 2 ++ 2 files changed, 21 insertions(+) diff --git a/drivers/net/wireless/realtek/rtw88/mac80211.c b/drivers/net/wireless/realtek/rtw88/mac80211.c index abded63..61436bb 100644 --- a/drivers/net/wireless/realtek/rtw88/mac80211.c +++ b/drivers/net/wireless/realtek/rtw88/mac80211.c @@ -446,20 +446,39 @@ static void rtw_ops_sw_scan_start(struct ieee80211_hw *hw, { struct rtw_dev *rtwdev = hw->priv; struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv; + u32 config = 0; rtw_leave_lps(rtwdev, rtwvif); + mutex_lock(&rtwdev->mutex); + + ether_addr_copy(rtwvif->mac_addr, mac_addr); + config |= PORT_SET_MAC_ADDR; + rtw_vif_port_config(rtwdev, rtwvif, config); + rtw_flag_set(rtwdev, RTW_FLAG_DIG_DISABLE); rtw_flag_set(rtwdev, RTW_FLAG_SCANNING); + + mutex_unlock(&rtwdev->mutex); } static void rtw_ops_sw_scan_complete(struct ieee80211_hw *hw, struct ieee80211_vif *vif) { struct rtw_dev *rtwdev = hw->priv; + struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv; + u32 config = 0; + + mutex_lock(&rtwdev->mutex); rtw_flag_clear(rtwdev, RTW_FLAG_SCANNING); rtw_flag_clear(rtwdev, RTW_FLAG_DIG_DISABLE); + + ether_addr_copy(rtwvif->mac_addr, vif->addr); + config |= PORT_SET_MAC_ADDR; + rtw_vif_port_config(rtwdev, rtwvif, config); + + mutex_unlock(&rtwdev->mutex); } const struct ieee80211_ops rtw_ops = { diff --git a/drivers/net/wireless/realtek/rtw88/main.c b/drivers/net/wireless/realtek/rtw88/main.c index d2e8d2e..306d799 100644 --- a/drivers/net/wireless/realtek/rtw88/main.c +++ b/drivers/net/wireless/realtek/rtw88/main.c @@ -1178,6 +1178,8 @@ int rtw_register_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw) hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS | WIPHY_FLAG_TDLS_EXTERNAL_SETUP; + hw->wiphy->features |= NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR; + rtw_set_supported_band(hw, rtwdev->chip); SET_IEEE80211_PERM_ADDR(hw, rtwdev->efuse.addr); -- 2.7.4 ^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v2 03/11] rtw88: add beacon function setting 2019-06-14 7:24 [PATCH v2 00/11] rtw88: regular driver upgrade with minor changes yhchuang 2019-06-14 7:24 ` [PATCH v2 01/11] rtw88: add fast xmit support yhchuang 2019-06-14 7:24 ` [PATCH v2 02/11] rtw88: add support for random mac scan yhchuang @ 2019-06-14 7:24 ` yhchuang 2019-06-14 7:24 ` [PATCH v2 04/11] rtw88: 8822c: add rf write protection when switching channel yhchuang ` (7 subsequent siblings) 10 siblings, 0 replies; 13+ messages in thread From: yhchuang @ 2019-06-14 7:24 UTC (permalink / raw) To: kvalo; +Cc: linux-wireless From: Chin-Yen Lee <timlee@realtek.com> Add beacon function setting routines for each hardware port. If beacon function is not enabled, the hardware is not able to synchronize with AP's beacon and can miss the beacons under some scenarios such as PS mode. For AP and Adhoc modes that require to send beacons, do not update the TSF, otherwise the beacon interval may be affected. Signed-off-by: Chin-Yen Lee <timlee@realtek.com> Signed-off-by: Yan-Hsuan Chuang <yhchuang@realtek.com> --- drivers/net/wireless/realtek/rtw88/mac80211.c | 13 +++++++++++++ drivers/net/wireless/realtek/rtw88/main.c | 5 +++++ drivers/net/wireless/realtek/rtw88/main.h | 3 +++ 3 files changed, 21 insertions(+) diff --git a/drivers/net/wireless/realtek/rtw88/mac80211.c b/drivers/net/wireless/realtek/rtw88/mac80211.c index 61436bb..abe6a14 100644 --- a/drivers/net/wireless/realtek/rtw88/mac80211.c +++ b/drivers/net/wireless/realtek/rtw88/mac80211.c @@ -85,30 +85,35 @@ static const struct rtw_vif_port rtw_vif_port[] = { .bssid = {.addr = 0x0618}, .net_type = {.addr = 0x0100, .mask = 0x30000}, .aid = {.addr = 0x06a8, .mask = 0x7ff}, + .bcn_ctrl = {.addr = 0x0550, .mask = 0xff}, }, [1] = { .mac_addr = {.addr = 0x0700}, .bssid = {.addr = 0x0708}, .net_type = {.addr = 0x0100, .mask = 0xc0000}, .aid = {.addr = 0x0710, .mask = 0x7ff}, + .bcn_ctrl = {.addr = 0x0551, .mask = 0xff}, }, [2] = { .mac_addr = {.addr = 0x1620}, .bssid = {.addr = 0x1628}, .net_type = {.addr = 0x1100, .mask = 0x3}, .aid = {.addr = 0x1600, .mask = 0x7ff}, + .bcn_ctrl = {.addr = 0x0578, .mask = 0xff}, }, [3] = { .mac_addr = {.addr = 0x1630}, .bssid = {.addr = 0x1638}, .net_type = {.addr = 0x1100, .mask = 0xc}, .aid = {.addr = 0x1604, .mask = 0x7ff}, + .bcn_ctrl = {.addr = 0x0579, .mask = 0xff}, }, [4] = { .mac_addr = {.addr = 0x1640}, .bssid = {.addr = 0x1648}, .net_type = {.addr = 0x1100, .mask = 0x30}, .aid = {.addr = 0x1608, .mask = 0x7ff}, + .bcn_ctrl = {.addr = 0x057a, .mask = 0xff}, }, }; @@ -120,6 +125,7 @@ static int rtw_ops_add_interface(struct ieee80211_hw *hw, enum rtw_net_type net_type; u32 config = 0; u8 port = 0; + u8 bcn_ctrl = 0; rtwvif->port = port; rtwvif->vif = vif; @@ -136,13 +142,16 @@ static int rtw_ops_add_interface(struct ieee80211_hw *hw, case NL80211_IFTYPE_AP: case NL80211_IFTYPE_MESH_POINT: net_type = RTW_NET_AP_MODE; + bcn_ctrl = BIT_EN_BCN_FUNCTION | BIT_DIS_TSF_UDT; break; case NL80211_IFTYPE_ADHOC: net_type = RTW_NET_AD_HOC; + bcn_ctrl = BIT_EN_BCN_FUNCTION | BIT_DIS_TSF_UDT; break; case NL80211_IFTYPE_STATION: default: net_type = RTW_NET_NO_LINK; + bcn_ctrl = BIT_EN_BCN_FUNCTION; break; } @@ -150,6 +159,8 @@ static int rtw_ops_add_interface(struct ieee80211_hw *hw, config |= PORT_SET_MAC_ADDR; rtwvif->net_type = net_type; config |= PORT_SET_NET_TYPE; + rtwvif->bcn_ctrl = bcn_ctrl; + config |= PORT_SET_BCN_CTRL; rtw_vif_port_config(rtwdev, rtwvif, config); mutex_unlock(&rtwdev->mutex); @@ -173,6 +184,8 @@ static void rtw_ops_remove_interface(struct ieee80211_hw *hw, config |= PORT_SET_MAC_ADDR; rtwvif->net_type = RTW_NET_NO_LINK; config |= PORT_SET_NET_TYPE; + rtwvif->bcn_ctrl = 0; + config |= PORT_SET_BCN_CTRL; rtw_vif_port_config(rtwdev, rtwvif, config); mutex_unlock(&rtwdev->mutex); diff --git a/drivers/net/wireless/realtek/rtw88/main.c b/drivers/net/wireless/realtek/rtw88/main.c index 306d799..b8e0519 100644 --- a/drivers/net/wireless/realtek/rtw88/main.c +++ b/drivers/net/wireless/realtek/rtw88/main.c @@ -308,6 +308,11 @@ void rtw_vif_port_config(struct rtw_dev *rtwdev, mask = rtwvif->conf->aid.mask; rtw_write32_mask(rtwdev, addr, mask, rtwvif->aid); } + if (config & PORT_SET_BCN_CTRL) { + addr = rtwvif->conf->bcn_ctrl.addr; + mask = rtwvif->conf->bcn_ctrl.mask; + rtw_write8_mask(rtwdev, addr, mask, rtwvif->bcn_ctrl); + } } static u8 hw_bw_cap_to_bitamp(u8 bw_cap) diff --git a/drivers/net/wireless/realtek/rtw88/main.h b/drivers/net/wireless/realtek/rtw88/main.h index 00fc77f..414d21f 100644 --- a/drivers/net/wireless/realtek/rtw88/main.h +++ b/drivers/net/wireless/realtek/rtw88/main.h @@ -431,6 +431,7 @@ enum rtw_vif_port_set { PORT_SET_BSSID = BIT(1), PORT_SET_NET_TYPE = BIT(2), PORT_SET_AID = BIT(3), + PORT_SET_BCN_CTRL = BIT(4), }; struct rtw_vif_port { @@ -438,6 +439,7 @@ struct rtw_vif_port { struct rtw_hw_reg bssid; struct rtw_hw_reg net_type; struct rtw_hw_reg aid; + struct rtw_hw_reg bcn_ctrl; }; struct rtw_tx_pkt_info { @@ -591,6 +593,7 @@ struct rtw_vif { u8 mac_addr[ETH_ALEN]; u8 bssid[ETH_ALEN]; u8 port; + u8 bcn_ctrl; const struct rtw_vif_port *conf; struct rtw_traffic_stats stats; -- 2.7.4 ^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v2 04/11] rtw88: 8822c: add rf write protection when switching channel 2019-06-14 7:24 [PATCH v2 00/11] rtw88: regular driver upgrade with minor changes yhchuang ` (2 preceding siblings ...) 2019-06-14 7:24 ` [PATCH v2 03/11] rtw88: add beacon function setting yhchuang @ 2019-06-14 7:24 ` yhchuang 2019-06-14 7:24 ` [PATCH v2 05/11] rtw88: 8822c: update channel and bandwidth BB setting yhchuang ` (6 subsequent siblings) 10 siblings, 0 replies; 13+ messages in thread From: yhchuang @ 2019-06-14 7:24 UTC (permalink / raw) To: kvalo; +Cc: linux-wireless From: Chien-Hsun Liao <ben.liao@realtek.com> Collision of writing rf registers could occur if the driver writes rf registers by direct write while the hardware is writing other rf registers by pi write simultaneously. Hardware pi write can be triggered by rf calibrations sometimes, so the driver can not always write rf registers by direct write protection. Direct write protection can make sure that there is no hardware pi write during the direct write. According to some experiments, if we add direct write protection when switching channel, the performance of rf calibration will not be affected. Signed-off-by: Chien-Hsun Liao <ben.liao@realtek.com> Signed-off-by: Yan-Hsuan Chuang <yhchuang@realtek.com> --- drivers/net/wireless/realtek/rtw88/phy.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/net/wireless/realtek/rtw88/phy.c b/drivers/net/wireless/realtek/rtw88/phy.c index 4381b36..580f310 100644 --- a/drivers/net/wireless/realtek/rtw88/phy.c +++ b/drivers/net/wireless/realtek/rtw88/phy.c @@ -596,14 +596,19 @@ bool rtw_phy_write_rf_reg(struct rtw_dev *rtwdev, enum rtw_rf_path rf_path, direct_addr = base_addr[rf_path] + (addr << 2); mask &= RFREG_MASK; - rtw_write32_mask(rtwdev, REG_RSV_CTRL, BITS_RFC_DIRECT, DISABLE_PI); - rtw_write32_mask(rtwdev, REG_WLRF1, BITS_RFC_DIRECT, DISABLE_PI); + if (addr == RF_CFGCH) { + rtw_write32_mask(rtwdev, REG_RSV_CTRL, BITS_RFC_DIRECT, DISABLE_PI); + rtw_write32_mask(rtwdev, REG_WLRF1, BITS_RFC_DIRECT, DISABLE_PI); + } + rtw_write32_mask(rtwdev, direct_addr, mask, data); udelay(1); - rtw_write32_mask(rtwdev, REG_RSV_CTRL, BITS_RFC_DIRECT, ENABLE_PI); - rtw_write32_mask(rtwdev, REG_WLRF1, BITS_RFC_DIRECT, ENABLE_PI); + if (addr == RF_CFGCH) { + rtw_write32_mask(rtwdev, REG_RSV_CTRL, BITS_RFC_DIRECT, ENABLE_PI); + rtw_write32_mask(rtwdev, REG_WLRF1, BITS_RFC_DIRECT, ENABLE_PI); + } return true; } -- 2.7.4 ^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v2 05/11] rtw88: 8822c: update channel and bandwidth BB setting 2019-06-14 7:24 [PATCH v2 00/11] rtw88: regular driver upgrade with minor changes yhchuang ` (3 preceding siblings ...) 2019-06-14 7:24 ` [PATCH v2 04/11] rtw88: 8822c: add rf write protection when switching channel yhchuang @ 2019-06-14 7:24 ` yhchuang 2019-06-14 7:24 ` [PATCH v2 06/11] rtw88: 8822c: disable rx clock gating before counter reset yhchuang ` (5 subsequent siblings) 10 siblings, 0 replies; 13+ messages in thread From: yhchuang @ 2019-06-14 7:24 UTC (permalink / raw) To: kvalo; +Cc: linux-wireless From: Chien-Hsun Liao <ben.liao@realtek.com> In 2G channels, the cck source and rxagc should be set to different values based on different bandwidth to increase the performance of rx sensitivity. To improve rx throughput performance, the values of sbd subtune and pt_opt should be changed in different bandwidth. Signed-off-by: Chien-Hsun Liao <ben.liao@realtek.com> Signed-off-by: Yan-Hsuan Chuang <yhchuang@realtek.com> --- drivers/net/wireless/realtek/rtw88/rtw8822c.c | 56 +++++++++++++++++++++++---- drivers/net/wireless/realtek/rtw88/rtw8822c.h | 8 ++++ 2 files changed, 56 insertions(+), 8 deletions(-) diff --git a/drivers/net/wireless/realtek/rtw88/rtw8822c.c b/drivers/net/wireless/realtek/rtw88/rtw8822c.c index b4f7242e..be46a1b 100644 --- a/drivers/net/wireless/realtek/rtw88/rtw8822c.c +++ b/drivers/net/wireless/realtek/rtw88/rtw8822c.c @@ -1015,8 +1015,28 @@ static void rtw8822c_set_channel_bb(struct rtw_dev *rtwdev, u8 channel, u8 bw, rtw_write32_clr(rtwdev, REG_CCKTXONLY, BIT_BB_CCK_CHECK_EN); rtw_write32_mask(rtwdev, REG_CCAMSK, 0x3F000000, 0xF); - rtw_write32_mask(rtwdev, REG_RXAGCCTL0, 0x1f0, 0x0); - rtw_write32_mask(rtwdev, REG_RXAGCCTL, 0x1f0, 0x0); + switch (bw) { + case RTW_CHANNEL_WIDTH_20: + rtw_write32_mask(rtwdev, REG_RXAGCCTL0, BITS_RXAGC_CCK, + 0x5); + rtw_write32_mask(rtwdev, REG_RXAGCCTL, BITS_RXAGC_CCK, + 0x5); + rtw_write32_mask(rtwdev, REG_RXAGCCTL0, BITS_RXAGC_OFDM, + 0x6); + rtw_write32_mask(rtwdev, REG_RXAGCCTL, BITS_RXAGC_OFDM, + 0x6); + break; + case RTW_CHANNEL_WIDTH_40: + rtw_write32_mask(rtwdev, REG_RXAGCCTL0, BITS_RXAGC_CCK, + 0x4); + rtw_write32_mask(rtwdev, REG_RXAGCCTL, BITS_RXAGC_CCK, + 0x4); + rtw_write32_mask(rtwdev, REG_RXAGCCTL0, BITS_RXAGC_OFDM, + 0x0); + rtw_write32_mask(rtwdev, REG_RXAGCCTL, BITS_RXAGC_OFDM, + 0x0); + break; + } if (channel == 13 || channel == 14) rtw_write32_mask(rtwdev, REG_SCOTRK, 0xfff, 0x969); else if (channel == 11 || channel == 12) @@ -1061,14 +1081,20 @@ static void rtw8822c_set_channel_bb(struct rtw_dev *rtwdev, u8 channel, u8 bw, rtw_write32_mask(rtwdev, REG_CCAMSK, 0x3F000000, 0x22); rtw_write32_mask(rtwdev, REG_TXDFIR0, 0x70, 0x3); if (channel >= 36 && channel <= 64) { - rtw_write32_mask(rtwdev, REG_RXAGCCTL0, 0x1f0, 0x1); - rtw_write32_mask(rtwdev, REG_RXAGCCTL, 0x1f0, 0x1); + rtw_write32_mask(rtwdev, REG_RXAGCCTL0, BITS_RXAGC_OFDM, + 0x1); + rtw_write32_mask(rtwdev, REG_RXAGCCTL, BITS_RXAGC_OFDM, + 0x1); } else if (channel >= 100 && channel <= 144) { - rtw_write32_mask(rtwdev, REG_RXAGCCTL0, 0x1f0, 0x2); - rtw_write32_mask(rtwdev, REG_RXAGCCTL, 0x1f0, 0x2); + rtw_write32_mask(rtwdev, REG_RXAGCCTL0, BITS_RXAGC_OFDM, + 0x2); + rtw_write32_mask(rtwdev, REG_RXAGCCTL, BITS_RXAGC_OFDM, + 0x2); } else if (channel >= 149) { - rtw_write32_mask(rtwdev, REG_RXAGCCTL0, 0x1f0, 0x3); - rtw_write32_mask(rtwdev, REG_RXAGCCTL, 0x1f0, 0x3); + rtw_write32_mask(rtwdev, REG_RXAGCCTL0, BITS_RXAGC_OFDM, + 0x3); + rtw_write32_mask(rtwdev, REG_RXAGCCTL, BITS_RXAGC_OFDM, + 0x3); } if (channel >= 36 && channel <= 51) @@ -1092,6 +1118,9 @@ static void rtw8822c_set_channel_bb(struct rtw_dev *rtwdev, u8 channel, u8 bw, rtw_write32_mask(rtwdev, REG_TXBWCTL, 0xffc0, 0x0); rtw_write32_mask(rtwdev, REG_TXCLK, 0x700, 0x7); rtw_write32_mask(rtwdev, REG_TXCLK, 0x700000, 0x6); + rtw_write32_mask(rtwdev, REG_CCK_SOURCE, BIT_NBI_EN, 0x0); + rtw_write32_mask(rtwdev, REG_SBD, BITS_SUBTUNE, 0x1); + rtw_write32_mask(rtwdev, REG_PT_CHSMO, BIT_PT_OPT, 0x0); break; case RTW_CHANNEL_WIDTH_40: rtw_write32_mask(rtwdev, REG_CCKSB, BIT(4), @@ -1100,12 +1129,17 @@ static void rtw8822c_set_channel_bb(struct rtw_dev *rtwdev, u8 channel, u8 bw, rtw_write32_mask(rtwdev, REG_TXBWCTL, 0xc0, 0x0); rtw_write32_mask(rtwdev, REG_TXBWCTL, 0xff00, (primary_ch_idx | (primary_ch_idx << 4))); + rtw_write32_mask(rtwdev, REG_CCK_SOURCE, BIT_NBI_EN, 0x1); + rtw_write32_mask(rtwdev, REG_SBD, BITS_SUBTUNE, 0x1); + rtw_write32_mask(rtwdev, REG_PT_CHSMO, BIT_PT_OPT, 0x1); break; case RTW_CHANNEL_WIDTH_80: rtw_write32_mask(rtwdev, REG_TXBWCTL, 0xf, 0xa); rtw_write32_mask(rtwdev, REG_TXBWCTL, 0xc0, 0x0); rtw_write32_mask(rtwdev, REG_TXBWCTL, 0xff00, (primary_ch_idx | (primary_ch_idx << 4))); + rtw_write32_mask(rtwdev, REG_SBD, BITS_SUBTUNE, 0x6); + rtw_write32_mask(rtwdev, REG_PT_CHSMO, BIT_PT_OPT, 0x1); break; case RTW_CHANNEL_WIDTH_5: rtw_write32_mask(rtwdev, REG_DFIRBW, 0x3FF0, 0x2AB); @@ -1113,6 +1147,9 @@ static void rtw8822c_set_channel_bb(struct rtw_dev *rtwdev, u8 channel, u8 bw, rtw_write32_mask(rtwdev, REG_TXBWCTL, 0xffc0, 0x1); rtw_write32_mask(rtwdev, REG_TXCLK, 0x700, 0x4); rtw_write32_mask(rtwdev, REG_TXCLK, 0x700000, 0x4); + rtw_write32_mask(rtwdev, REG_CCK_SOURCE, BIT_NBI_EN, 0x0); + rtw_write32_mask(rtwdev, REG_SBD, BITS_SUBTUNE, 0x1); + rtw_write32_mask(rtwdev, REG_PT_CHSMO, BIT_PT_OPT, 0x0); break; case RTW_CHANNEL_WIDTH_10: rtw_write32_mask(rtwdev, REG_DFIRBW, 0x3FF0, 0x2AB); @@ -1120,6 +1157,9 @@ static void rtw8822c_set_channel_bb(struct rtw_dev *rtwdev, u8 channel, u8 bw, rtw_write32_mask(rtwdev, REG_TXBWCTL, 0xffc0, 0x2); rtw_write32_mask(rtwdev, REG_TXCLK, 0x700, 0x6); rtw_write32_mask(rtwdev, REG_TXCLK, 0x700000, 0x5); + rtw_write32_mask(rtwdev, REG_CCK_SOURCE, BIT_NBI_EN, 0x0); + rtw_write32_mask(rtwdev, REG_SBD, BITS_SUBTUNE, 0x1); + rtw_write32_mask(rtwdev, REG_PT_CHSMO, BIT_PT_OPT, 0x0); break; } } diff --git a/drivers/net/wireless/realtek/rtw88/rtw8822c.h b/drivers/net/wireless/realtek/rtw88/rtw8822c.h index d3bd985..ef708ba 100644 --- a/drivers/net/wireless/realtek/rtw88/rtw8822c.h +++ b/drivers/net/wireless/realtek/rtw88/rtw8822c.h @@ -133,6 +133,8 @@ struct rtw8822c_efuse { #define REG_DYMPRITH 0x86c #define REG_DYMENTH0 0x870 #define REG_DYMENTH 0x874 +#define REG_SBD 0x88c +#define BITS_SUBTUNE GENMASK(15, 12) #define REG_DYMTHMIN 0x8a4 #define REG_TXBWCTL 0x9b0 #define REG_TXCLK 0x9b4 @@ -140,12 +142,16 @@ struct rtw8822c_efuse { #define REG_MRCM 0xc38 #define REG_AGCSWSH 0xc44 #define REG_ANTWTPD 0xc54 +#define REG_PT_CHSMO 0xcbc +#define BIT_PT_OPT BIT(21) #define REG_ORITXCODE 0x1800 #define REG_3WIRE 0x180c #define BIT_3WIRE_TX_EN BIT(0) #define BIT_3WIRE_RX_EN BIT(1) #define BIT_3WIRE_PI_ON BIT(28) #define REG_RXAGCCTL0 0x18ac +#define BITS_RXAGC_CCK GENMASK(15, 12) +#define BITS_RXAGC_OFDM GENMASK(8, 4) #define REG_CCKSB 0x1a00 #define REG_RXCCKSEL 0x1a04 #define REG_BGCTRL 0x1a14 @@ -164,6 +170,8 @@ struct rtw8822c_efuse { #define REG_TXF5 0x1aa0 #define REG_TXF6 0x1aac #define REG_TXF7 0x1ab0 +#define REG_CCK_SOURCE 0x1abc +#define BIT_NBI_EN BIT(30) #define REG_TXANT 0x1c28 #define REG_ENCCK 0x1c3c #define BIT_CCK_BLK_EN BIT(1) -- 2.7.4 ^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v2 06/11] rtw88: 8822c: disable rx clock gating before counter reset 2019-06-14 7:24 [PATCH v2 00/11] rtw88: regular driver upgrade with minor changes yhchuang ` (4 preceding siblings ...) 2019-06-14 7:24 ` [PATCH v2 05/11] rtw88: 8822c: update channel and bandwidth BB setting yhchuang @ 2019-06-14 7:24 ` yhchuang 2019-06-14 7:24 ` [PATCH v2 07/11] rtw88: 8822c: use more accurate ofdm fa counting yhchuang ` (4 subsequent siblings) 10 siblings, 0 replies; 13+ messages in thread From: yhchuang @ 2019-06-14 7:24 UTC (permalink / raw) To: kvalo; +Cc: linux-wireless From: Yan-Hsuan Chuang <yhchuang@realtek.com> Driver Could fail to reset counter if rx clock gating is not disabled. So we need to disable rx clock gating before resetting counters. Otherwise counters may increase unexpected. Signed-off-by: Yan-Hsuan Chuang <yhchuang@realtek.com> --- drivers/net/wireless/realtek/rtw88/rtw8822c.c | 4 ++++ drivers/net/wireless/realtek/rtw88/rtw8822c.h | 2 ++ 2 files changed, 6 insertions(+) diff --git a/drivers/net/wireless/realtek/rtw88/rtw8822c.c b/drivers/net/wireless/realtek/rtw88/rtw8822c.c index be46a1b..22380b1 100644 --- a/drivers/net/wireless/realtek/rtw88/rtw8822c.c +++ b/drivers/net/wireless/realtek/rtw88/rtw8822c.c @@ -1508,8 +1508,12 @@ static void rtw8822c_false_alarm_statistics(struct rtw_dev *rtwdev) rtw_write32_mask(rtwdev, REG_CCANRX, BIT_CCK_FA_RST, 2); rtw_write32_mask(rtwdev, REG_CCANRX, BIT_OFDM_FA_RST, 0); rtw_write32_mask(rtwdev, REG_CCANRX, BIT_OFDM_FA_RST, 2); + + /* disable rx clk gating to reset counters */ + rtw_write32_clr(rtwdev, REG_RX_BREAK, BIT_COM_RX_GCK_EN); rtw_write32_set(rtwdev, REG_CNT_CTRL, BIT_ALL_CNT_RST); rtw_write32_clr(rtwdev, REG_CNT_CTRL, BIT_ALL_CNT_RST); + rtw_write32_set(rtwdev, REG_RX_BREAK, BIT_COM_RX_GCK_EN); } static void rtw8822c_do_iqk(struct rtw_dev *rtwdev) diff --git a/drivers/net/wireless/realtek/rtw88/rtw8822c.h b/drivers/net/wireless/realtek/rtw88/rtw8822c.h index ef708ba..33125e7 100644 --- a/drivers/net/wireless/realtek/rtw88/rtw8822c.h +++ b/drivers/net/wireless/realtek/rtw88/rtw8822c.h @@ -177,6 +177,8 @@ struct rtw8822c_efuse { #define BIT_CCK_BLK_EN BIT(1) #define BIT_CCK_OFDM_BLK_EN (BIT(0) | BIT(1)) #define REG_CCAMSK 0x1c80 +#define REG_RX_BREAK 0x1d2c +#define BIT_COM_RX_GCK_EN BIT(31) #define REG_RXFNCTL 0x1d30 #define REG_RXIGI 0x1d70 #define REG_ENFN 0x1e24 -- 2.7.4 ^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v2 07/11] rtw88: 8822c: use more accurate ofdm fa counting 2019-06-14 7:24 [PATCH v2 00/11] rtw88: regular driver upgrade with minor changes yhchuang ` (5 preceding siblings ...) 2019-06-14 7:24 ` [PATCH v2 06/11] rtw88: 8822c: disable rx clock gating before counter reset yhchuang @ 2019-06-14 7:24 ` yhchuang 2019-06-14 7:24 ` [PATCH v2 08/11] rtw88: power on again if it was already on yhchuang ` (3 subsequent siblings) 10 siblings, 0 replies; 13+ messages in thread From: yhchuang @ 2019-06-14 7:24 UTC (permalink / raw) To: kvalo; +Cc: linux-wireless From: Yan-Hsuan Chuang <yhchuang@realtek.com> 8822c used to count OFDM FA count by subtracting tx count from FA count. But it need to substract more counters to be accurate. However, we can count it by adding up all of the FA counters we want. And it is simpler to add than list all of the components to substract. Signed-off-by: Yan-Hsuan Chuang <yhchuang@realtek.com> --- drivers/net/wireless/realtek/rtw88/rtw8822c.c | 25 +++++++++++++++++++++---- drivers/net/wireless/realtek/rtw88/rtw8822c.h | 5 +++++ 2 files changed, 26 insertions(+), 4 deletions(-) diff --git a/drivers/net/wireless/realtek/rtw88/rtw8822c.c b/drivers/net/wireless/realtek/rtw88/rtw8822c.c index 22380b1..bbe61cc 100644 --- a/drivers/net/wireless/realtek/rtw88/rtw8822c.c +++ b/drivers/net/wireless/realtek/rtw88/rtw8822c.c @@ -1491,13 +1491,30 @@ static void rtw8822c_false_alarm_statistics(struct rtw_dev *rtwdev) u32 cck_enable; u32 cck_fa_cnt; u32 ofdm_fa_cnt; - u32 ofdm_tx_counter; + u32 ofdm_fa_cnt1, ofdm_fa_cnt2, ofdm_fa_cnt3, ofdm_fa_cnt4, ofdm_fa_cnt5; + u16 parity_fail, rate_illegal, crc8_fail, mcs_fail, sb_search_fail, + fast_fsync, crc8_fail_vhta, mcs_fail_vht; cck_enable = rtw_read32(rtwdev, REG_ENCCK) & BIT_CCK_BLK_EN; cck_fa_cnt = rtw_read16(rtwdev, REG_CCK_FACNT); - ofdm_fa_cnt = rtw_read16(rtwdev, REG_OFDM_FACNT); - ofdm_tx_counter = rtw_read16(rtwdev, REG_OFDM_TXCNT); - ofdm_fa_cnt -= ofdm_tx_counter; + + ofdm_fa_cnt1 = rtw_read32(rtwdev, REG_OFDM_FACNT1); + ofdm_fa_cnt2 = rtw_read32(rtwdev, REG_OFDM_FACNT2); + ofdm_fa_cnt3 = rtw_read32(rtwdev, REG_OFDM_FACNT3); + ofdm_fa_cnt4 = rtw_read32(rtwdev, REG_OFDM_FACNT4); + ofdm_fa_cnt5 = rtw_read32(rtwdev, REG_OFDM_FACNT5); + + parity_fail = FIELD_GET(GENMASK(31, 16), ofdm_fa_cnt1); + rate_illegal = FIELD_GET(GENMASK(15, 0), ofdm_fa_cnt2); + crc8_fail = FIELD_GET(GENMASK(31, 16), ofdm_fa_cnt2); + crc8_fail_vhta = FIELD_GET(GENMASK(15, 0), ofdm_fa_cnt3); + mcs_fail = FIELD_GET(GENMASK(15, 0), ofdm_fa_cnt4); + mcs_fail_vht = FIELD_GET(GENMASK(31, 16), ofdm_fa_cnt4); + fast_fsync = FIELD_GET(GENMASK(15, 0), ofdm_fa_cnt5); + sb_search_fail = FIELD_GET(GENMASK(31, 16), ofdm_fa_cnt5); + + ofdm_fa_cnt = parity_fail + rate_illegal + crc8_fail + crc8_fail_vhta + + mcs_fail + mcs_fail_vht + fast_fsync + sb_search_fail; dm_info->cck_fa_cnt = cck_fa_cnt; dm_info->ofdm_fa_cnt = ofdm_fa_cnt; diff --git a/drivers/net/wireless/realtek/rtw88/rtw8822c.h b/drivers/net/wireless/realtek/rtw88/rtw8822c.h index 33125e7..06fbabc 100644 --- a/drivers/net/wireless/realtek/rtw88/rtw8822c.h +++ b/drivers/net/wireless/realtek/rtw88/rtw8822c.h @@ -188,6 +188,11 @@ struct rtw8822c_efuse { #define REG_CNT_CTRL 0x1eb4 #define BIT_ALL_CNT_RST BIT(25) #define REG_OFDM_FACNT 0x2d00 +#define REG_OFDM_FACNT1 0x2d04 +#define REG_OFDM_FACNT2 0x2d08 +#define REG_OFDM_FACNT3 0x2d0c +#define REG_OFDM_FACNT4 0x2d10 +#define REG_OFDM_FACNT5 0x2d20 #define REG_OFDM_TXCNT 0x2de0 #define REG_ORITXCODE2 0x4100 #define REG_3WIRE2 0x410c -- 2.7.4 ^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v2 08/11] rtw88: power on again if it was already on 2019-06-14 7:24 [PATCH v2 00/11] rtw88: regular driver upgrade with minor changes yhchuang ` (6 preceding siblings ...) 2019-06-14 7:24 ` [PATCH v2 07/11] rtw88: 8822c: use more accurate ofdm fa counting yhchuang @ 2019-06-14 7:24 ` yhchuang 2019-06-14 7:24 ` [PATCH v2 09/11] rtw88: restore DACK results to save time yhchuang ` (2 subsequent siblings) 10 siblings, 0 replies; 13+ messages in thread From: yhchuang @ 2019-06-14 7:24 UTC (permalink / raw) To: kvalo; +Cc: linux-wireless From: Yan-Hsuan Chuang <yhchuang@realtek.com> We could fail to power on because it was already on. If the return value is -EALREADY, power off and then power on again to turn on the hardware as expected. Signed-off-by: Yan-Hsuan Chuang <yhchuang@realtek.com> --- drivers/net/wireless/realtek/rtw88/mac.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/net/wireless/realtek/rtw88/mac.c b/drivers/net/wireless/realtek/rtw88/mac.c index 25a923b..fc14b37 100644 --- a/drivers/net/wireless/realtek/rtw88/mac.c +++ b/drivers/net/wireless/realtek/rtw88/mac.c @@ -285,8 +285,14 @@ int rtw_mac_power_on(struct rtw_dev *rtwdev) goto err; ret = rtw_mac_power_switch(rtwdev, true); - if (ret) + if (ret == -EALREADY) { + rtw_mac_power_switch(rtwdev, false); + ret = rtw_mac_power_switch(rtwdev, true); + if (ret) + goto err; + } else if (ret) { goto err; + } ret = rtw_mac_init_system_cfg(rtwdev); if (ret) -- 2.7.4 ^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v2 09/11] rtw88: restore DACK results to save time 2019-06-14 7:24 [PATCH v2 00/11] rtw88: regular driver upgrade with minor changes yhchuang ` (7 preceding siblings ...) 2019-06-14 7:24 ` [PATCH v2 08/11] rtw88: power on again if it was already on yhchuang @ 2019-06-14 7:24 ` yhchuang 2019-06-14 7:24 ` [PATCH v2 10/11] rtw88: rsvd page should go though management queue yhchuang 2019-06-14 7:24 ` [PATCH v2 11/11] rtw88: fix typo rtw_writ16_set yhchuang 10 siblings, 0 replies; 13+ messages in thread From: yhchuang @ 2019-06-14 7:24 UTC (permalink / raw) To: kvalo; +Cc: linux-wireless From: Yan-Hsuan Chuang <yhchuang@realtek.com> DACK is done right after the hardware has been turned on, which means it will be done every time we leave the IDLE state. But it takes ~2 seconds to finish DACK. We can back up the results and restore them. And it only takes a few milliseconds to restore the results to the hardware, saving a lot of time. Signed-off-by: Yan-Hsuan Chuang <yhchuang@realtek.com> --- drivers/net/wireless/realtek/rtw88/main.h | 8 + drivers/net/wireless/realtek/rtw88/rtw8822c.c | 351 +++++++++++++++++++++++++- drivers/net/wireless/realtek/rtw88/rtw8822c.h | 8 + 3 files changed, 355 insertions(+), 12 deletions(-) diff --git a/drivers/net/wireless/realtek/rtw88/main.h b/drivers/net/wireless/realtek/rtw88/main.h index 414d21f..92730507 100644 --- a/drivers/net/wireless/realtek/rtw88/main.h +++ b/drivers/net/wireless/realtek/rtw88/main.h @@ -841,6 +841,9 @@ struct rtw_chip_info { u32 rfe_defs_size; }; +#define DACK_MSBK_BACKUP_NUM 0xf +#define DACK_DCK_BACKUP_NUM 0x2 + struct rtw_dm_info { u32 cck_fa_cnt; u32 ofdm_fa_cnt; @@ -856,6 +859,11 @@ struct rtw_dm_info { u8 cck_gi_u_bnd; u8 cck_gi_l_bnd; + + /* backup dack results for each path and I/Q */ + u32 dack_adck[RTW_RF_PATH_MAX]; + u16 dack_msbk[RTW_RF_PATH_MAX][2][DACK_MSBK_BACKUP_NUM]; + u8 dack_dck[RTW_RF_PATH_MAX][2][DACK_DCK_BACKUP_NUM]; }; struct rtw_efuse { diff --git a/drivers/net/wireless/realtek/rtw88/rtw8822c.c b/drivers/net/wireless/realtek/rtw88/rtw8822c.c index bbe61cc..f6214ff 100644 --- a/drivers/net/wireless/realtek/rtw88/rtw8822c.c +++ b/drivers/net/wireless/realtek/rtw88/rtw8822c.c @@ -203,7 +203,7 @@ static void rtw8822c_dac_iq_offset(struct rtw_dev *rtwdev, u32 *vec, u32 *val) *val = t; } -static u32 rtw8822c_get_path_base_addr(u8 path) +static u32 rtw8822c_get_path_write_addr(u8 path) { u32 base_addr; @@ -222,6 +222,25 @@ static u32 rtw8822c_get_path_base_addr(u8 path) return base_addr; } +static u32 rtw8822c_get_path_read_addr(u8 path) +{ + u32 base_addr; + + switch (path) { + case RF_PATH_A: + base_addr = 0x2800; + break; + case RF_PATH_B: + base_addr = 0x4500; + break; + default: + WARN_ON(1); + return -1; + } + + return base_addr; +} + static bool rtw8822c_dac_iq_check(struct rtw_dev *rtwdev, u32 value) { bool ret = true; @@ -316,8 +335,6 @@ static void rtw8822c_dac_cal_rf_mode(struct rtw_dev *rtwdev, u32 iv[DACK_SN_8822C], qv[DACK_SN_8822C]; u32 rf_a, rf_b; - mdelay(10); - rf_a = rtw_read_rf(rtwdev, RF_PATH_A, 0x0, RFREG_MASK); rf_b = rtw_read_rf(rtwdev, RF_PATH_B, 0x0, RFREG_MASK); @@ -347,6 +364,7 @@ static void rtw8822c_dac_bb_setting(struct rtw_dev *rtwdev) static void rtw8822c_dac_cal_adc(struct rtw_dev *rtwdev, u8 path, u32 *adc_ic, u32 *adc_qc) { + struct rtw_dm_info *dm_info = &rtwdev->dm_info; u32 ic = 0, qc = 0, temp = 0; u32 base_addr; u32 path_sel; @@ -354,7 +372,7 @@ static void rtw8822c_dac_cal_adc(struct rtw_dev *rtwdev, rtw_dbg(rtwdev, RTW_DBG_RFK, "[DACK] ADCK path(%d)\n", path); - base_addr = rtw8822c_get_path_base_addr(path); + base_addr = rtw8822c_get_path_write_addr(path); switch (path) { case RF_PATH_A: path_sel = 0xa0000; @@ -396,6 +414,7 @@ static void rtw8822c_dac_cal_adc(struct rtw_dev *rtwdev, } temp = (ic & 0x3ff) | ((qc & 0x3ff) << 10); rtw_write32(rtwdev, base_addr + 0x68, temp); + dm_info->dack_adck[path] = temp; rtw_dbg(rtwdev, RTW_DBG_RFK, "[DACK] ADCK 0x%08x=0x08%x\n", base_addr + 0x68, temp); /* check ADC DC offset */ @@ -422,10 +441,14 @@ static void rtw8822c_dac_cal_adc(struct rtw_dev *rtwdev, static void rtw8822c_dac_cal_step1(struct rtw_dev *rtwdev, u8 path) { + struct rtw_dm_info *dm_info = &rtwdev->dm_info; u32 base_addr; + u32 read_addr; - base_addr = rtw8822c_get_path_base_addr(path); + base_addr = rtw8822c_get_path_write_addr(path); + read_addr = rtw8822c_get_path_read_addr(path); + rtw_write32(rtwdev, base_addr + 0x68, dm_info->dack_adck[path]); rtw_write32(rtwdev, base_addr + 0x0c, 0xdff00220); if (path == RF_PATH_A) { rtw_write32(rtwdev, base_addr + 0x60, 0xf0040ff0); @@ -447,11 +470,13 @@ static void rtw8822c_dac_cal_step1(struct rtw_dev *rtwdev, u8 path) rtw_write32(rtwdev, base_addr + 0xcc, 0x0a11fb89); mdelay(1); rtw_write32(rtwdev, base_addr + 0xb8, 0x62000000); - mdelay(20); rtw_write32(rtwdev, base_addr + 0xd4, 0x62000000); mdelay(20); + if (!check_hw_ready(rtwdev, read_addr + 0x08, 0x7fff80, 0xffff) || + !check_hw_ready(rtwdev, read_addr + 0x34, 0x7fff80, 0xffff)) + rtw_err(rtwdev, "failed to wait for dack ready\n"); rtw_write32(rtwdev, base_addr + 0xb8, 0x02000000); - mdelay(20); + mdelay(1); rtw_write32(rtwdev, base_addr + 0xbc, 0x0008ff87); rtw_write32(rtwdev, 0x9b4, 0xdb6db600); rtw_write32(rtwdev, base_addr + 0x10, 0x02d508c5); @@ -465,7 +490,7 @@ static void rtw8822c_dac_cal_step2(struct rtw_dev *rtwdev, u32 base_addr; u32 ic, qc, ic_in, qc_in; - base_addr = rtw8822c_get_path_base_addr(path); + base_addr = rtw8822c_get_path_write_addr(path); rtw_write32_mask(rtwdev, base_addr + 0xbc, 0xf0000000, 0x0); rtw_write32_mask(rtwdev, base_addr + 0xc0, 0xf, 0x8); rtw_write32_mask(rtwdev, base_addr + 0xd8, 0xf0000000, 0x0); @@ -514,10 +539,12 @@ static void rtw8822c_dac_cal_step3(struct rtw_dev *rtwdev, u8 path, u32 *i_out, u32 *q_out) { u32 base_addr; + u32 read_addr; u32 ic, qc; u32 temp; - base_addr = rtw8822c_get_path_base_addr(path); + base_addr = rtw8822c_get_path_write_addr(path); + read_addr = rtw8822c_get_path_read_addr(path); ic = *ic_in; qc = *qc_in; @@ -542,11 +569,13 @@ static void rtw8822c_dac_cal_step3(struct rtw_dev *rtwdev, u8 path, rtw_write32(rtwdev, base_addr + 0xcc, 0x0a11fb89); mdelay(1); rtw_write32(rtwdev, base_addr + 0xb8, 0x62000000); - mdelay(20); rtw_write32(rtwdev, base_addr + 0xd4, 0x62000000); mdelay(20); + if (!check_hw_ready(rtwdev, read_addr + 0x24, 0x07f80000, ic) || + !check_hw_ready(rtwdev, read_addr + 0x50, 0x07f80000, qc)) + rtw_err(rtwdev, "failed to write IQ vector to hardware\n"); rtw_write32(rtwdev, base_addr + 0xb8, 0x02000000); - mdelay(20); + mdelay(1); rtw_write32_mask(rtwdev, base_addr + 0xbc, 0xe, 0x3); rtw_write32(rtwdev, 0x9b4, 0xdb6db600); @@ -583,7 +612,7 @@ static void rtw8822c_dac_cal_step3(struct rtw_dev *rtwdev, u8 path, static void rtw8822c_dac_cal_step4(struct rtw_dev *rtwdev, u8 path) { - u32 base_addr = rtw8822c_get_path_base_addr(path); + u32 base_addr = rtw8822c_get_path_write_addr(path); rtw_write32(rtwdev, base_addr + 0x68, 0x0); rtw_write32(rtwdev, base_addr + 0x10, 0x02d508c4); @@ -591,6 +620,296 @@ static void rtw8822c_dac_cal_step4(struct rtw_dev *rtwdev, u8 path) rtw_write32_mask(rtwdev, base_addr + 0x30, BIT(30), 0x1); } +static void rtw8822c_dac_cal_backup_vec(struct rtw_dev *rtwdev, + u8 path, u8 vec, u32 w_addr, u32 r_addr) +{ + struct rtw_dm_info *dm_info = &rtwdev->dm_info; + u16 val; + u32 i; + + if (WARN_ON(vec >= 2)) + return; + + for (i = 0; i < DACK_MSBK_BACKUP_NUM; i++) { + rtw_write32_mask(rtwdev, w_addr, 0xf0000000, i); + val = (u16)rtw_read32_mask(rtwdev, r_addr, 0x7fc0000); + dm_info->dack_msbk[path][vec][i] = val; + } +} + +static void rtw8822c_dac_cal_backup_path(struct rtw_dev *rtwdev, u8 path) +{ + u32 w_off = 0x1c; + u32 r_off = 0x2c; + u32 w_addr, r_addr; + + if (WARN_ON(path >= 2)) + return; + + /* backup I vector */ + w_addr = rtw8822c_get_path_write_addr(path) + 0xb0; + r_addr = rtw8822c_get_path_read_addr(path) + 0x10; + rtw8822c_dac_cal_backup_vec(rtwdev, path, 0, w_addr, r_addr); + + /* backup Q vector */ + w_addr = rtw8822c_get_path_write_addr(path) + 0xb0 + w_off; + r_addr = rtw8822c_get_path_read_addr(path) + 0x10 + r_off; + rtw8822c_dac_cal_backup_vec(rtwdev, path, 1, w_addr, r_addr); +} + +static void rtw8822c_dac_cal_backup_dck(struct rtw_dev *rtwdev) +{ + struct rtw_dm_info *dm_info = &rtwdev->dm_info; + u8 val; + + val = (u8)rtw_read32_mask(rtwdev, REG_DCKA_I_0, 0xf0000000); + dm_info->dack_dck[RF_PATH_A][0][0] = val; + val = (u8)rtw_read32_mask(rtwdev, REG_DCKA_I_1, 0xf); + dm_info->dack_dck[RF_PATH_A][0][1] = val; + val = (u8)rtw_read32_mask(rtwdev, REG_DCKA_Q_0, 0xf0000000); + dm_info->dack_dck[RF_PATH_A][1][0] = val; + val = (u8)rtw_read32_mask(rtwdev, REG_DCKA_Q_1, 0xf); + dm_info->dack_dck[RF_PATH_A][1][1] = val; + + val = (u8)rtw_read32_mask(rtwdev, REG_DCKB_I_0, 0xf0000000); + dm_info->dack_dck[RF_PATH_B][0][0] = val; + val = (u8)rtw_read32_mask(rtwdev, REG_DCKB_I_1, 0xf); + dm_info->dack_dck[RF_PATH_B][1][0] = val; + val = (u8)rtw_read32_mask(rtwdev, REG_DCKB_Q_0, 0xf0000000); + dm_info->dack_dck[RF_PATH_B][0][1] = val; + val = (u8)rtw_read32_mask(rtwdev, REG_DCKB_Q_1, 0xf); + dm_info->dack_dck[RF_PATH_B][1][1] = val; +} + +static void rtw8822c_dac_cal_backup(struct rtw_dev *rtwdev) +{ + u32 temp[3]; + + temp[0] = rtw_read32(rtwdev, 0x1860); + temp[1] = rtw_read32(rtwdev, 0x4160); + temp[2] = rtw_read32(rtwdev, 0x9b4); + + /* set clock */ + rtw_write32(rtwdev, 0x9b4, 0xdb66db00); + + /* backup path-A I/Q */ + rtw_write32_clr(rtwdev, 0x1830, BIT(30)); + rtw_write32_mask(rtwdev, 0x1860, 0xfc000000, 0x3c); + rtw8822c_dac_cal_backup_path(rtwdev, RF_PATH_A); + + /* backup path-B I/Q */ + rtw_write32_clr(rtwdev, 0x4130, BIT(30)); + rtw_write32_mask(rtwdev, 0x4160, 0xfc000000, 0x3c); + rtw8822c_dac_cal_backup_path(rtwdev, RF_PATH_B); + + rtw8822c_dac_cal_backup_dck(rtwdev); + rtw_write32_set(rtwdev, 0x1830, BIT(30)); + rtw_write32_set(rtwdev, 0x4130, BIT(30)); + + rtw_write32(rtwdev, 0x1860, temp[0]); + rtw_write32(rtwdev, 0x4160, temp[1]); + rtw_write32(rtwdev, 0x9b4, temp[2]); +} + +static void rtw8822c_dac_cal_restore_dck(struct rtw_dev *rtwdev) +{ + struct rtw_dm_info *dm_info = &rtwdev->dm_info; + u8 val; + + rtw_write32_set(rtwdev, REG_DCKA_I_0, BIT(19)); + val = dm_info->dack_dck[RF_PATH_A][0][0]; + rtw_write32_mask(rtwdev, REG_DCKA_I_0, 0xf0000000, val); + val = dm_info->dack_dck[RF_PATH_A][0][1]; + rtw_write32_mask(rtwdev, REG_DCKA_I_1, 0xf, val); + + rtw_write32_set(rtwdev, REG_DCKA_Q_0, BIT(19)); + val = dm_info->dack_dck[RF_PATH_A][1][0]; + rtw_write32_mask(rtwdev, REG_DCKA_Q_0, 0xf0000000, val); + val = dm_info->dack_dck[RF_PATH_A][1][1]; + rtw_write32_mask(rtwdev, REG_DCKA_Q_1, 0xf, val); + + rtw_write32_set(rtwdev, REG_DCKB_I_0, BIT(19)); + val = dm_info->dack_dck[RF_PATH_B][0][0]; + rtw_write32_mask(rtwdev, REG_DCKB_I_0, 0xf0000000, val); + val = dm_info->dack_dck[RF_PATH_B][0][1]; + rtw_write32_mask(rtwdev, REG_DCKB_I_1, 0xf, val); + + rtw_write32_set(rtwdev, REG_DCKB_Q_0, BIT(19)); + val = dm_info->dack_dck[RF_PATH_B][1][0]; + rtw_write32_mask(rtwdev, REG_DCKB_Q_0, 0xf0000000, val); + val = dm_info->dack_dck[RF_PATH_B][1][1]; + rtw_write32_mask(rtwdev, REG_DCKB_Q_1, 0xf, val); +} + +static void rtw8822c_dac_cal_restore_prepare(struct rtw_dev *rtwdev) +{ + rtw_write32(rtwdev, 0x9b4, 0xdb66db00); + + rtw_write32_mask(rtwdev, 0x18b0, BIT(27), 0x0); + rtw_write32_mask(rtwdev, 0x18cc, BIT(27), 0x0); + rtw_write32_mask(rtwdev, 0x41b0, BIT(27), 0x0); + rtw_write32_mask(rtwdev, 0x41cc, BIT(27), 0x0); + + rtw_write32_mask(rtwdev, 0x1830, BIT(30), 0x0); + rtw_write32_mask(rtwdev, 0x1860, 0xfc000000, 0x3c); + rtw_write32_mask(rtwdev, 0x18b4, BIT(0), 0x1); + rtw_write32_mask(rtwdev, 0x18d0, BIT(0), 0x1); + + rtw_write32_mask(rtwdev, 0x4130, BIT(30), 0x0); + rtw_write32_mask(rtwdev, 0x4160, 0xfc000000, 0x3c); + rtw_write32_mask(rtwdev, 0x41b4, BIT(0), 0x1); + rtw_write32_mask(rtwdev, 0x41d0, BIT(0), 0x1); + + rtw_write32_mask(rtwdev, 0x18b0, 0xf00, 0x0); + rtw_write32_mask(rtwdev, 0x18c0, BIT(14), 0x0); + rtw_write32_mask(rtwdev, 0x18cc, 0xf00, 0x0); + rtw_write32_mask(rtwdev, 0x18dc, BIT(14), 0x0); + + rtw_write32_mask(rtwdev, 0x18b0, BIT(0), 0x0); + rtw_write32_mask(rtwdev, 0x18cc, BIT(0), 0x0); + rtw_write32_mask(rtwdev, 0x18b0, BIT(0), 0x1); + rtw_write32_mask(rtwdev, 0x18cc, BIT(0), 0x1); + + rtw8822c_dac_cal_restore_dck(rtwdev); + + rtw_write32_mask(rtwdev, 0x18c0, 0x38000, 0x7); + rtw_write32_mask(rtwdev, 0x18dc, 0x38000, 0x7); + rtw_write32_mask(rtwdev, 0x41c0, 0x38000, 0x7); + rtw_write32_mask(rtwdev, 0x41dc, 0x38000, 0x7); + + rtw_write32_mask(rtwdev, 0x18b8, BIT(26) | BIT(25), 0x1); + rtw_write32_mask(rtwdev, 0x18d4, BIT(26) | BIT(25), 0x1); + + rtw_write32_mask(rtwdev, 0x41b0, 0xf00, 0x0); + rtw_write32_mask(rtwdev, 0x41c0, BIT(14), 0x0); + rtw_write32_mask(rtwdev, 0x41cc, 0xf00, 0x0); + rtw_write32_mask(rtwdev, 0x41dc, BIT(14), 0x0); + + rtw_write32_mask(rtwdev, 0x41b0, BIT(0), 0x0); + rtw_write32_mask(rtwdev, 0x41cc, BIT(0), 0x0); + rtw_write32_mask(rtwdev, 0x41b0, BIT(0), 0x1); + rtw_write32_mask(rtwdev, 0x41cc, BIT(0), 0x1); + + rtw_write32_mask(rtwdev, 0x41b8, BIT(26) | BIT(25), 0x1); + rtw_write32_mask(rtwdev, 0x41d4, BIT(26) | BIT(25), 0x1); +} + +static bool rtw8822c_dac_cal_restore_wait(struct rtw_dev *rtwdev, + u32 target_addr, u32 toggle_addr) +{ + u32 cnt = 0; + + do { + rtw_write32_mask(rtwdev, toggle_addr, BIT(26) | BIT(25), 0x0); + rtw_write32_mask(rtwdev, toggle_addr, BIT(26) | BIT(25), 0x2); + + if (rtw_read32_mask(rtwdev, target_addr, 0xf) == 0x6) + return true; + + } while (cnt++ < 100); + + return false; +} + +static bool rtw8822c_dac_cal_restore_path(struct rtw_dev *rtwdev, u8 path) +{ + struct rtw_dm_info *dm_info = &rtwdev->dm_info; + u32 w_off = 0x1c; + u32 r_off = 0x2c; + u32 w_i, r_i, w_q, r_q; + u32 value; + u32 i; + + w_i = rtw8822c_get_path_write_addr(path) + 0xb0; + r_i = rtw8822c_get_path_read_addr(path) + 0x08; + w_q = rtw8822c_get_path_write_addr(path) + 0xb0 + w_off; + r_q = rtw8822c_get_path_read_addr(path) + 0x08 + r_off; + + if (!rtw8822c_dac_cal_restore_wait(rtwdev, r_i, w_i + 0x8)) + return false; + + for (i = 0; i < DACK_MSBK_BACKUP_NUM; i++) { + rtw_write32_mask(rtwdev, w_i + 0x4, BIT(2), 0x0); + value = dm_info->dack_msbk[path][0][i]; + rtw_write32_mask(rtwdev, w_i + 0x4, 0xff8, value); + rtw_write32_mask(rtwdev, w_i, 0xf0000000, i); + rtw_write32_mask(rtwdev, w_i + 0x4, BIT(2), 0x1); + } + + rtw_write32_mask(rtwdev, w_i + 0x4, BIT(2), 0x0); + + if (!rtw8822c_dac_cal_restore_wait(rtwdev, r_q, w_q + 0x8)) + return false; + + for (i = 0; i < DACK_MSBK_BACKUP_NUM; i++) { + rtw_write32_mask(rtwdev, w_q + 0x4, BIT(2), 0x0); + value = dm_info->dack_msbk[path][1][i]; + rtw_write32_mask(rtwdev, w_q + 0x4, 0xff8, value); + rtw_write32_mask(rtwdev, w_q, 0xf0000000, i); + rtw_write32_mask(rtwdev, w_q + 0x4, BIT(2), 0x1); + } + rtw_write32_mask(rtwdev, w_q + 0x4, BIT(2), 0x0); + + rtw_write32_mask(rtwdev, w_i + 0x8, BIT(26) | BIT(25), 0x0); + rtw_write32_mask(rtwdev, w_q + 0x8, BIT(26) | BIT(25), 0x0); + rtw_write32_mask(rtwdev, w_i + 0x4, BIT(0), 0x0); + rtw_write32_mask(rtwdev, w_q + 0x4, BIT(0), 0x0); + + return true; +} + +static bool __rtw8822c_dac_cal_restore(struct rtw_dev *rtwdev) +{ + if (!rtw8822c_dac_cal_restore_path(rtwdev, RF_PATH_A)) + return false; + + if (!rtw8822c_dac_cal_restore_path(rtwdev, RF_PATH_B)) + return false; + + return true; +} + +static bool rtw8822c_dac_cal_restore(struct rtw_dev *rtwdev) +{ + struct rtw_dm_info *dm_info = &rtwdev->dm_info; + u32 temp[3]; + + /* sample the first element for both path's IQ vector */ + if (dm_info->dack_msbk[RF_PATH_A][0][0] == 0 && + dm_info->dack_msbk[RF_PATH_A][1][0] == 0 && + dm_info->dack_msbk[RF_PATH_B][0][0] == 0 && + dm_info->dack_msbk[RF_PATH_B][1][0] == 0) + return false; + + temp[0] = rtw_read32(rtwdev, 0x1860); + temp[1] = rtw_read32(rtwdev, 0x4160); + temp[2] = rtw_read32(rtwdev, 0x9b4); + + rtw8822c_dac_cal_restore_prepare(rtwdev); + if (!check_hw_ready(rtwdev, 0x2808, 0x7fff80, 0xffff) || + !check_hw_ready(rtwdev, 0x2834, 0x7fff80, 0xffff) || + !check_hw_ready(rtwdev, 0x4508, 0x7fff80, 0xffff) || + !check_hw_ready(rtwdev, 0x4534, 0x7fff80, 0xffff)) + return false; + + if (!__rtw8822c_dac_cal_restore(rtwdev)) { + rtw_err(rtwdev, "failed to restore dack vectors\n"); + return false; + } + + rtw_write32_mask(rtwdev, 0x1830, BIT(30), 0x1); + rtw_write32_mask(rtwdev, 0x4130, BIT(30), 0x1); + rtw_write32(rtwdev, 0x1860, temp[0]); + rtw_write32(rtwdev, 0x4160, temp[1]); + rtw_write32_mask(rtwdev, 0x18b0, BIT(27), 0x1); + rtw_write32_mask(rtwdev, 0x18cc, BIT(27), 0x1); + rtw_write32_mask(rtwdev, 0x41b0, BIT(27), 0x1); + rtw_write32_mask(rtwdev, 0x41cc, BIT(27), 0x1); + rtw_write32(rtwdev, 0x9b4, temp[2]); + + return true; +} + static void rtw8822c_rf_dac_cal(struct rtw_dev *rtwdev) { struct rtw_backup_info backup_rf[DACK_RF_8822C * DACK_PATH_8822C]; @@ -600,6 +919,11 @@ static void rtw8822c_rf_dac_cal(struct rtw_dev *rtwdev) u32 ic_a = 0x0, qc_a = 0x0, ic_b = 0x0, qc_b = 0x0; u32 adc_ic_a = 0x0, adc_qc_a = 0x0, adc_ic_b = 0x0, adc_qc_b = 0x0; + if (rtw8822c_dac_cal_restore(rtwdev)) + return; + + /* not able to restore, do it */ + rtw8822c_dac_backup_reg(rtwdev, backup, backup_rf); rtw8822c_dac_bb_setting(rtwdev); @@ -644,6 +968,9 @@ static void rtw8822c_rf_dac_cal(struct rtw_dev *rtwdev) rtw8822c_dac_restore_reg(rtwdev, backup, backup_rf); + /* backup results to restore, saving a lot of time */ + rtw8822c_dac_cal_backup(rtwdev); + rtw_dbg(rtwdev, RTW_DBG_RFK, "[DACK] path A: ic=0x%x, qc=0x%x\n", ic_a, qc_a); rtw_dbg(rtwdev, RTW_DBG_RFK, "[DACK] path B: ic=0x%x, qc=0x%x\n", ic_b, qc_b); rtw_dbg(rtwdev, RTW_DBG_RFK, "[DACK] path A: i=0x%x, q=0x%x\n", i_a, q_a); diff --git a/drivers/net/wireless/realtek/rtw88/rtw8822c.h b/drivers/net/wireless/realtek/rtw88/rtw8822c.h index 06fbabc..5ee1de4 100644 --- a/drivers/net/wireless/realtek/rtw88/rtw8822c.h +++ b/drivers/net/wireless/realtek/rtw88/rtw8822c.h @@ -152,6 +152,10 @@ struct rtw8822c_efuse { #define REG_RXAGCCTL0 0x18ac #define BITS_RXAGC_CCK GENMASK(15, 12) #define BITS_RXAGC_OFDM GENMASK(8, 4) +#define REG_DCKA_I_0 0x18bc +#define REG_DCKA_I_1 0x18c0 +#define REG_DCKA_Q_0 0x18d8 +#define REG_DCKA_Q_1 0x18dc #define REG_CCKSB 0x1a00 #define REG_RXCCKSEL 0x1a04 #define REG_BGCTRL 0x1a14 @@ -197,5 +201,9 @@ struct rtw8822c_efuse { #define REG_ORITXCODE2 0x4100 #define REG_3WIRE2 0x410c #define REG_RXAGCCTL 0x41ac +#define REG_DCKB_I_0 0x41bc +#define REG_DCKB_I_1 0x41c0 +#define REG_DCKB_Q_0 0x41d8 +#define REG_DCKB_Q_1 0x41dc #endif -- 2.7.4 ^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v2 10/11] rtw88: rsvd page should go though management queue 2019-06-14 7:24 [PATCH v2 00/11] rtw88: regular driver upgrade with minor changes yhchuang ` (8 preceding siblings ...) 2019-06-14 7:24 ` [PATCH v2 09/11] rtw88: restore DACK results to save time yhchuang @ 2019-06-14 7:24 ` yhchuang 2019-06-14 7:24 ` [PATCH v2 11/11] rtw88: fix typo rtw_writ16_set yhchuang 10 siblings, 0 replies; 13+ messages in thread From: yhchuang @ 2019-06-14 7:24 UTC (permalink / raw) To: kvalo; +Cc: linux-wireless From: Yan-Hsuan Chuang <yhchuang@realtek.com> The hardware default uses management queue to transmit frames that are downloaded into reserved page, so we need to clearly assign the frames to use qsel in TX_DESC_QSEL_MGMT to avoid using wrong queue. Signed-off-by: Yan-Hsuan Chuang <yhchuang@realtek.com> --- drivers/net/wireless/realtek/rtw88/tx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/wireless/realtek/rtw88/tx.c b/drivers/net/wireless/realtek/rtw88/tx.c index e32faf8..8eaa980 100644 --- a/drivers/net/wireless/realtek/rtw88/tx.c +++ b/drivers/net/wireless/realtek/rtw88/tx.c @@ -362,6 +362,6 @@ void rtw_rsvd_page_pkt_info_update(struct rtw_dev *rtwdev, pkt_info->bmc = bmc; pkt_info->tx_pkt_size = skb->len; pkt_info->offset = chip->tx_pkt_desc_sz; - pkt_info->qsel = skb->priority; + pkt_info->qsel = TX_DESC_QSEL_MGMT; pkt_info->ls = true; } -- 2.7.4 ^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v2 11/11] rtw88: fix typo rtw_writ16_set 2019-06-14 7:24 [PATCH v2 00/11] rtw88: regular driver upgrade with minor changes yhchuang ` (9 preceding siblings ...) 2019-06-14 7:24 ` [PATCH v2 10/11] rtw88: rsvd page should go though management queue yhchuang @ 2019-06-14 7:24 ` yhchuang 10 siblings, 0 replies; 13+ messages in thread From: yhchuang @ 2019-06-14 7:24 UTC (permalink / raw) To: kvalo; +Cc: linux-wireless From: Tzu-En Huang <tehuang@realtek.com> rtw_writ16_set should be rtw_write16_set Signed-off-by: Tzu-En Huang <tehuang@realtek.com> Signed-off-by: Yan-Hsuan Chuang <yhchuang@realtek.com> --- drivers/net/wireless/realtek/rtw88/hci.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/wireless/realtek/rtw88/hci.h b/drivers/net/wireless/realtek/rtw88/hci.h index 2676582..aba329c 100644 --- a/drivers/net/wireless/realtek/rtw88/hci.h +++ b/drivers/net/wireless/realtek/rtw88/hci.h @@ -97,7 +97,7 @@ static inline void rtw_write8_set(struct rtw_dev *rtwdev, u32 addr, u8 bit) rtw_write8(rtwdev, addr, val | bit); } -static inline void rtw_writ16_set(struct rtw_dev *rtwdev, u32 addr, u16 bit) +static inline void rtw_write16_set(struct rtw_dev *rtwdev, u32 addr, u16 bit) { u16 val; -- 2.7.4 ^ permalink raw reply related [flat|nested] 13+ messages in thread
end of thread, other threads:[~2019-06-25 5:09 UTC | newest] Thread overview: 13+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2019-06-14 7:24 [PATCH v2 00/11] rtw88: regular driver upgrade with minor changes yhchuang 2019-06-14 7:24 ` [PATCH v2 01/11] rtw88: add fast xmit support yhchuang 2019-06-25 5:09 ` Kalle Valo 2019-06-14 7:24 ` [PATCH v2 02/11] rtw88: add support for random mac scan yhchuang 2019-06-14 7:24 ` [PATCH v2 03/11] rtw88: add beacon function setting yhchuang 2019-06-14 7:24 ` [PATCH v2 04/11] rtw88: 8822c: add rf write protection when switching channel yhchuang 2019-06-14 7:24 ` [PATCH v2 05/11] rtw88: 8822c: update channel and bandwidth BB setting yhchuang 2019-06-14 7:24 ` [PATCH v2 06/11] rtw88: 8822c: disable rx clock gating before counter reset yhchuang 2019-06-14 7:24 ` [PATCH v2 07/11] rtw88: 8822c: use more accurate ofdm fa counting yhchuang 2019-06-14 7:24 ` [PATCH v2 08/11] rtw88: power on again if it was already on yhchuang 2019-06-14 7:24 ` [PATCH v2 09/11] rtw88: restore DACK results to save time yhchuang 2019-06-14 7:24 ` [PATCH v2 10/11] rtw88: rsvd page should go though management queue yhchuang 2019-06-14 7:24 ` [PATCH v2 11/11] rtw88: fix typo rtw_writ16_set yhchuang
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